Parker FL20-S Series, Руководство пользователя

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FL20-S Series
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Syntax Expression Annotations
CMPWSRR R1 R2 B0 Compare R1 register value with R2 register value, send result into B0-B3 register.
CMPWSDR D1 R2 B0 Compare immediate operand 1 with R2 register value, send result into B0-B3 register.
CMPWSPR P1 R2 B0 Compare P1 register value with R2 register value, send result into B0-B3 register.
CMPWSDP D1 P2 B0 Compare immediate operand 1 with P2 register value, send result into B0-B3 register.
CMPWSRP R1 P2 B0 Compare R1 register value with P2 register value, send result into B0-B3 register.
CMPWSPP P1 P2 B0 Compare P1 register value with P2 register value, send result into B0-B3 register.
c) 32-bit Unsigned Comparison Instruction
Instruction Format: [CMPD□□ X Y Z(n)]
Instruction Description:
CMPD is instruction code, □□ is instruction execution register area, X,Yis
comparison register address; Z is the register address that stores results, compare the value of X register
address with the value of Y register address, and store the result into Z register;
Result outputs:
If X register value is lower than Y register value, then Z(n)=1
；
Z(n+1)=0
；
Z(n+2)=0
；
If X register value is larger than Y register value, then Z(n)=0
；
Z(n+1)=0
；
Z(n+2)=1
；
If X register value equals to Y register value, then Z(n)=0
；
Z(n+1)=0
；
Z(n+2)=1
；
User can operate for R area, P area and immediate operand; See details as table below:
Syntax Expression Annotations
CMPDRR R1 R2 B0 Compare R1 register value with R2 register value, send result into B0-B3 register.
CMPDDR D1 R2 B0 Compare immediate operand 1 with R2 register value, send result into B0-B3 register.
CMPDPR P1 R2 B0 Compare P1 register value with R2 register value, send result into B0-B3 register.
CMPDDP D1 P2 B0 Compare immediate operand 1 with P2 register value, send result into B0-B3 register.
CMPDRP R1 P2 B0 Compare R1 register value with P2 register value, send result into B0-B3 register.
CMPDPP P1 P2 B0 Compare P1 register value with P2 register value, send result into B0-B3 register.
d) 32-bit Signed Comparison Instruction
Instruction Format: [CMPDS□□ X Y Z(n)]
Instruction Description: CMPDSis instruction code, □□ is instruction execution register area, X,Yis
comparison register address; Z is the register address that stores results, compare the value of X register
address with the value of Y register address, and store the result into Z register;
Result outputs:
If X register value is lower than Y register value, then Z(n)=1
；
Z(n+1)=0
；
Z(n+2)=0
；
If X register value is larger than Y register value, then Z(n)=0
；
Z(n+1)=0
；
Z(n+2)=1
；
If X register value equals to Y register value, then Z(n)=0
；
Z(n+1)=0
；
Z(n+2)=1
；
User can operate for R area, P area and immediate operand; See details as table below: