OTE VS 2001, Техническое руководство

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VS 2001
Technical Handbook
Technical Description
Page 32 Marconi Proprietary information
P/N: 779-0373/02
Revision 02
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1 synchronous communication serial line towards EEPROMS and FPGA;
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3 A/D converter (10 bit) with 3 active channels multiplexed for the VSWR
measurement (i.e. temperature);
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1 watchdog;
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25 independent I/O ports at 1 bit each;
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1 FLASH memory (1 Mword) for storing both the microprocessor and the DSP
application software. The microcontroller software can be applied directly by
the flash without time penalties;
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1 SRAM memory (256 kword);
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Device for terminal identification through 48 bit individual code;
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Non-volatile read/write memory for storing some semi-permanent network
data;
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Non-volatile read/write memory protected by password for storing the Air
Interface Encryption keys.
2.3.1.7 DSP
Basically the DSP (Digital Signal Processor) is used for the execution of following
procedures:
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Physical layer numerical processing algorithms both in uplink (transmission)
and in downlink (reception);
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Management of the TETRA protocol relative to the Lower MAC sub-level;
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Management of the interface towards/from I/F AUDIO for the digitised voice
signal;
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Management of the serial interface towards/from I/F RT for the TETRA
modulated base band signal;
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Management of the asynchronous serial line integrated on FPGA and
dedicated to the DSP.
The DSP also hosts the following devices and interfaces:
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2 independent and buffered bi-directional synchronous serial lines; one for
interfacing with the audio section and the other one with the radio section;
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1 Host Port Interface with Dual Port RAM (2 kword) for communication with
the microprocessor;
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1 standard JTAG interface for communication with external emulator;
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Digital PLL for Fck clock frequency generation (see Tab. 2.3) derived from the
Fmck master clock frequency (see Tab. 2.3);
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32 kword of internal RAM for execution of the critical routines from the point of
view of the speed of execution and storing of frequently used data;
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64 kword of external RAM, of which 3.2 kword reserved for the data and 32
kword reserved for the programs. The DSP automatically selects the
necessary area;