Maxiflex P3 PAC User Manual
52
-© Omniflex
UMM126XR18.pdf
Input 5 High-High Limit
50
Input 5 High Limit
51
Input 5 Low Limit
52
Input 5 Low-Low Limit
53
Input 5 Deadband
54
Input 6 High-High Limit
55
Input 6 High Limit
56
Input 6 Low Limit
57
Input 6 Low-Low Limit
58
Input 6 Deadband
59
7.18 M1760A
– 32SOE – 32 way Sequence of Events Input Module - 24V Input
M1761A
– 32SOE – 32 way Sequence of Events Input Module - 48V Input
DIGITAL INPUT DATA SPACE
DIT (Offset)
Digital Inputs 1-16
where individual inputs are allocated as follows:
0
Input 1 = Bit 0 (LSB)
Input 2 = Bit 1
Input 3 = Bit 2
Input 4 = Bit 3
Input 5 = Bit 4
Input 6 = Bit 5
Input 7 = Bit 6
Input 8 = Bit 7
Input 9 = Bit 8
Input 10 = Bit 9
Input 11 = Bit 10
Input 12 = Bit 11
Input 13 = Bit 12
Input 14 = Bit 13
Input 15 = Bit 14
Input 16 = Bit 15 (MSB)
Digital Inputs 17-32
where individual inputs are allocated as follows:
1
Input 17 = Bit 0 (LSB)
Input 18 = Bit 1
Input 19 = Bit 2
Input 20 = Bit 3
Input 21 = Bit 4
Input 22 = Bit 5
Input 23 = Bit 6
Input 24 = Bit 7
Input 25 = Bit 8
Input 26 = Bit 9
Input 27 = Bit 10
Input 28 = Bit 11
Input 29 = Bit 12
Input 30 = Bit 13
Input 31 = Bit 14
Input 32 = Bit 15 (MSB)
Digital Inputs 33-48
where individual inputs are allocated as follows:
2
Input Queue > 95% = Bit 0 (LSB)
Reserved = Bits 1 to 16
Digital Inputs 49-64
Reserved = Bits 0 to 16
3
DIGITAL OUTPUT DATA SPACE
DIT (Offset)
Digital Outputs 1-16
where individual inputs are allocated as follows:
0
Inhibit Input 1 = Bit 0 (LSB)
Inhibit Input 2 = Bit 1
Inhibit Input 3 = Bit 2
Inhibit Input 4 = Bit 3
Inhibit Input 5 = Bit 4
Inhibit Input 6 = Bit 5
Inhibit Input 7 = Bit 6
Inhibit Input 8 = Bit 7
Inhibit Input 9 = Bit 8
Inhibit Input 10 = Bit 9
Inhibit Input 11 = Bit 10
Inhibit Input 12 = Bit 11
Inhibit Input 13 = Bit 12
Inhibit Input 14 = Bit 13
Inhibit Input 15 = Bit 14
Inhibit Input 16 = Bit 15 (MSB)
