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Section 4
Theory of Operation
2775 Main Board
22
Model 2001 Service Manual
Rev. 01
On the rising CKS signal a CLKS output pulse at IC18 pin 14 is sent as a serial clock input to
the ADC selected by the decode lines. Decode results are shown below.
Successive CKS/CLKS pulses cause the ADC data to be shifted out of the ADC (most
significant bit first) along the serial data line (SDATA) to the CPU serial input (RXS) at IC16 pin
52.
After receiving the correct number of bits for the ADC being read, the CPU changes the AA1
and AA0 decode lines and exerts the Next line (NEXT*) at IC18 pin 9 low. This restarts the serial
data shifting out of the newly selected ADC.
After all three ADCs have been read, the CPU sets the AA1 and AA0 decode lines to exert the
internal TEND signal and set the 8-bit ADC to the next channel (so that it has time to settle
before the next read of the ADC). This re-enables the CPUINIT line. At this point the CSI/O
controller is reset awaiting an INT5MS pulse to begin the cycle again.
RS232 Serial Communication
See sheet 4 of 4 on schematic.
The Model 2001 supports serial (RS232) communication with external devices via the monitor’s
rear panel connector. Signals to and from the rear panel RS232 connector are electrically
isolated from the rest of the Model 2001 electronics by four opto-isolators (IC3-IC6).
An isolated secondary coil from transformer T1 is rectified and filtered by D1 and C1 before
being input to the +5 volt regulator IC2. The regulated output of IC2 is sent to pin 25 of the 25-
pin D connector on the rear panel in order to power the optional Analog Module or NovaCARD
writer module. The supply also powers IC1.
The Dual RS232 Transmitter/Receiver, IC1, uses a 5 volt supply (pin 16). The two
Receive (Rx) inputs can accept ±30 volt levels, while the two Transmit (Tx) lines output ±9 volt
levels. The four level translators within the chip turn the RS232 level signals to 5 volt TTL/
CMOS compatible levels.
Two signals lines TX0 and TX1 transmit data from the CPU across the opto-isolators ICs 3 and
4 to IC1. Here the signals are level shifted to ±9 volt levels and sent to the rear panel connector.
When the CPU brings the TX0 signal at R62 Low, the LED portion of IC3 becomes forward
biased and illuminates and causes the transistor portion of the device to conduct. Therefore,
when TX0 is Low, IC1 pin 11 is Low and when TX0 is High, IC1 pin 11 is also High. All four opto-
isolators work in the same way. IC1 level shifts its input at pin 11 and outputs (9 volt levels at
the TX signal at J101 pin 3. This transmit signal is used to output data to RS232 devices
including the Seiko DPU-414 thermal printer.
The CPU TX1 signal crosses the isolation barrier at IC4. The 0-5 volt opto-isolator output at IC4
pin 5 is used to bring data to external accessories. Jumper JP1 is used to select which channel
will provide the TTL level (TX0 or TX1) to pin 19 of J101. In the Model 2001 channel 1 (RX1
and TX1) are dedicated to communicate with the DSP module (2776-01). The IC4 pin 5 output
AA1
AA0
Decode
0
0
Red LED 20-bit ADC
0
1
Infrared LED 20-bit ADC
1
0
Sensor Status 8-bit ADC
1
1
Internal CSI/O signal (TEND)
Содержание MARS PO2 TECH 2001
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