Novametrix Medical Systems MARS PO2 TECH 2001, Руководство по обслуживанию

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Section 4
Theory of Operation 2775 Main Board
12
Model 2001 Service Manual Rev. 01
The backup voltage (VBACK) is regulated by IC12 from the VIN supply. Capacitors C22 and
C27 serve as filters and D17 allows VCC to power VBACK circuitry when the monitor is on. At
this point D18 is biased off so IC12 is idle. When the monitor is turned off and VCC collapses
D18 is then forward biased and IC12 now supplies VBACK circuitry, D17 at this time is reverse
biased and prevents power from reaching VCC.
The saturation sensor LEDs derive their power (LEDSRC) from the current regulator IC32. (See
sheet 2 of 4 on schematic.) Resistor R31 limits the maximum steady state current draw to 45
mA (nominal draw 35 mA). Regulator output is filtered by C85 and L2. The charge stored on
capacitor C1 supplies the 290-350 mA peak currents that can occur when the sensor LEDs are
turned on. Diode D12 prevents the regulator output from exc7.5 volts while the fuse,
F2, provides current limit protection in the event of a regulator circuitry failure. The RP 8 & 10
(pins 1,8 and 5,6) divider network provides the CPU (via IC33) with a means to monitor the
LEDSRC status.
The +VA and -V12 supplies are regulated to +V5 (+5 volts) and -V5 (-5 volts) by IC44 and IC43
respectively. These supplies are used by the 20 bit ADCs, the 8 bit ADC and other circuits
associated with them.
Voltage References
See sheet 2 of 4 on schematic.
A +2.5 volt precision reference supply (VREF), generated by IC35 from the +V12 supply, is
used as a reference voltage for the 20 bit ADC chips IC37 and IC34.
The +2.5 volt output from IC35 pin 6 is fed to the non-inverting input of amplifier IC36 pin 3.
Resistors R32 and R33 combine for a gain of 1.617 that provides a +4.096 volt reference
(approximately) supply, 4VREF, at IC31 pin 1. If jumper JP2 is shorted then VREF will be 3.0
volts and R32 will be adjusted so that 4VREF is still 4.096 volts.
The 4VREF is fed to IC30 pin 13 which is set up as a unity gain inverting buffer amplifier,
therefore the output at IC30 pin 14 is -4 volts. This -4 volts is used by IC29 as a reference
voltage for VLED (Voltage LED) and CNTRST (Contrast) controls. (See sheet 3 of 4 on
schematic.)
Preserving RAM and Real Time Clock Data
See sheet 4 of 4 on schematic.
The NAND gate output at IC11 pin11 will be Low when the monitor is on (IC10 pin 2 is High)
and High when the monitor is off (IC10 pin 2 is Low). This PWRON* (Power On) signal is used
to prevent corruption of RAM and real time clock data when the monitor is turned off. It does
this by going High and therefore denying CPU access to the RAM and real time clock so that
as the power supplies fall when the monitor is turned off, the CPU cannot send erroneous data
to these devices.
Whenever the CPU is writing information to the RAM or Real Time Clock, the CPU momentarily
sends the OFFDIS (Off Disable) line High. The High going level appears at IC11 pin 2. Since
the monitor is powered on, IC11 pin1 will be High. This means IC11 pin3 momentarily goes
Low, Q6 starts to conduct and IC10 pin 4 goes High. In this reset condition the Q1 output #1
flip-flop of IC10 (pin 2) will be held high even if the user presses the POWER key and clocks
the flip-flop. In effect, the CPU is not allowing the monitor to be turned off. The Low at IC11 pin3
will last for the duration of the RC time constant set by C21 and RP4 (pins 5,6). These values
were chosen to produce a time-out longer than the time necessary to complete the write to RAM
or Real Time Clock operation. After the RC time-out, IC10 pin 4 returns Low and a press of the