NEC Express5800/180Rb-7, Руководство пользователя

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System I/O Addresses/Memory Map/PCI Configuration and Device
Map/Interrupts/Video Mode Assignments A-5
Interrupts
Table A-4 below recommends the logical interrupt mapping of interrupt sources;
it reflects a typical configuration, but these interrupts can be changed by the
user. Use the information to determine how to program each interrupt. The
actual interrupt map is defined using configuration registers in the PIIX4E and
the I/O controller. I/O Redirection Registers in the I/O APIC are provided for
each interrupt signal; the signals define hardware interrupt signal characteristics
for APIC messages sent to local APIC(s).
Note
: To disable either IDE controller and reuse the
interrupt: If you plan to disable either IDE controller in
order to reuse the interrupt for that controller, you must
physically unplug the IDE cable from the board connector
(IDE0), if a cable is present. Simply disabling the drive by
configuring the SSU option does not make the interrupt
available.
Table A-4. Interrupts
PID Interrupt PCI Interrupt Component/PCI Slot # PCI Bus
0 D P10 PCI-D
1 C P10 PCI-D
2 B Onboard SCSI Channel B PCI-A
3 B P10 PCI-D
4 A P10 PCI-D
5 D P9 PCI-D
6 C P9 PCI-D
7 B P9 PCI-D
8 A P9 PCI-D
9 D P8 PCI-C
10 C P8 PCI-C
11 B P8 PCI-C
12 A P8 PCI-C
13 D P7 PCI-C
14 C P7 PCI-C
15 B P7 PCI-C
16 A P7 PCI-C