National Instruments NI 6612, Руководство пользователя

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2-2
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Chapter 2 Digital I/O
Figures 2-1 and 2-2 show the circuitry of a DIO line on Port 0 and Port 1 respectively. Each DIO
line is similar.
Figure 2-1. Digital I/O Circuitry on Port 0
Figure 2-2. Digital I/O Circuitry on Port 1
In both Figures 2-1 and 2-2, CI represents additional input capacitance. This capacitance
provides some filtering and slew-rate control benefits. However, the capacitance also limits the
maximum input frequency.
CI is populated on all the lines except for the default counter source input pins. CI is not
populated on the default source input pins in order to allow the measurement of higher speed
input signals. Table 2-2 lists the lines that do not populate CI. You must use the lines in Table 2-2
when measuring inputs frequencies above 25 MHz. For more information, refer to the
NI 6612
Specifications.
DO Sa mple Clock
DO W a veform
Gener a tion FIFO
DO. x Direction Control
S t a tic DI
DI Sa mple Clock
DI Ch a nge
Detection
I/O Protection
We a k P u ll-Down
P0. x
S t a tic DO
B u ffer
DI W a veform
Me asu rement
FIFO
Filter
CI
DO. x Direction Control
S t a tic DI
DI Ch a nge
Detection
I/O Protection
We a k P u ll-Down
P1. x
S t a tic DO
B u ffer
Filter
CI