Mitsubishi Electric PSS**S72FT, Руководство пользователя

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<Dual-In-Line Package Intelligent Power Module>
1200V Mini DIPIPM with BSD Series APPLICATION NOTE
Publication Date: September 2015
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3.3.3 Static Electricity Withstand Capability
DIPIPM has been confirmed to be with t/-200V or more withstand capability against static electricity
from the following tests shown in Fig.3-3-3, 4. The results (typical data) are described in Table 3-3-1.
Fig.3-3-3 LVIC terminal Surge Test circuit Fig.3-3-4 HVIC terminal Surge Test circuit
Conditions: Surge voltage is increased by 0.1kV step and only one surge pulse is impressed at each voltage.
(Limit voltage of surge simulator: ±4.0kV, Judgment method; change in V-I characteristic)
Table 3-3-1 PSSxxS72FT Typical ESD capability
[Control terminal part] Common data for PSSxxS72FT because of all types have same interface circuit.
Ter -
UP, VP, WP-V
NC
1.0 0.9
V
P1
- V
NC
1.5 1.5
V
UFB
-V
UFS,
V
VFB
-V
VFS
,V
WFB
-V
WFS
2.1 2.1
UN, VN, WN-V
NC
1.1 1.0
V
N1
-V
NC
4.0 or more 4.0 or more
CIN-V
NC
1.0 0.5
Fo-V
NC
1.0 0.9
CFO-V
NC
0.9 1.0
V
OT
-V
NC
1.1 1.4
[Power terminal part]
PSS05S72FT
Ter -
P-NU,NV,NW 4.0 or more 4.0 or more
U-NU, V-NV, W-NW 4.0 or more 4.0 or more
PSS10S72FT
Ter -
P-NU,NV,NW 4.0 or more 4.0 or more
U-NU, V-NV, W-NW 4.0 or more 4.0 or more
V
N1
U
N
V
NC
V
N
LVIC
R=0 Ω
C=200pF
W
N
V
P1
V
PC
HVIC
R=0 Ω
C=200pF
U
P
V
UFB
V
G
V
UFS
(U)