<Dual-In-Line Package Intelligent Power Module>
1200V Mini DIPIPM with BSD Series APPLICATION NOTE
Publication Date: September 2015
28
3.1.2 Interface Circuit (Direct Coupling Interface example for using one shunt resistor)
Fig.3-1-2 shows a typical application circuit of interface schematic, in which control signals are transferred directly input from
a controller (e.g. MCU, DSP).
Fig.3-1-2 Interface circuit example except for common emitter type
(1) If control GND is connected with power GND by common broad pattern, it may cause malfunction by power GND fluctuation.
It is recommended to connect control GND and power GND at only a point N1 (near the terminal of shunt resistor).
(2) It is recommended to insert a Zener diode D1(24V/1W) between each pair of control supply terminals to prevent surge destruction.
(3) To prevent surge destruction, the wiring between the smoothing capacitor and the P, N1 terminals should be as short as possible.
Generally a 0.1-0.22
μ
F snubber capacitor C3 between the P-N1 terminals is recommended.
(4) R1, C4 of RC filter for preventing protection circuit malfunction is recommended to select tight tolerance, temp-compensated type.
The time constant R1C4 should be set so that SC current is shut down within 2
μ
s. (1.5
μ
s~2
μ
s is recommended generally.) SC
interrupting time might vary with the wiring pattern, so the enough evaluation on the real system is necessary.
(5) To prevent malfunction, the wiring of A, B, C should be as short as possible.
(6) The point D at which the wiring to CIN filter is divided should be near the terminal of shunt resistor. NU, NV, NW terminals should be
connected at near NU, NV, NW terminals when it is used by one shunt operation.
Low inductance SMD type with tight tolerance,
temp-compensated type is recommended for shunt resistor.
(7) All capacitors should be mounted as close to the terminals as possible. (C1: good temperature, frequency characteristic electrolytic type
and C2:0.22
μ
-2
μ
F, good temperature, frequency and DC bias characteristic ceramic type are recommended.)
(8) Input logic is High-active. There is a 3.3k
Ω
(min.) pull-down resistor in the input circuit of IC. To prevent malfunction, the input wiring
should be as short as possible. When using RC coupling, make the input signal level meet the turn-on and turn-off threshold voltage.
(9) Fo output is open drain type. It should be pulled up to power supply of MCU (e.g. 5V,3.3V) by a resistor that makes I
Fo
up to 1mA. (I
FO
is
estimated roughly by the formula of control power supply voltage divided by pull-up resistance. In the case of pulled up to 5V, 10k
Ω
(5k
Ω
or more) is recommended.) When using opto coupler, Fo also can be pulled up to 15V (control supply of DIPIPM) by the resistor.
(10)
Fo pulse width can be set by the capacitor connected to CFO terminal. C
FO
(F) = 9.1 x 10
-6
x t
FO
(Required Fo pulse width).
(11) If high frequency noise superimposed to the control supply line, IC malfunction might happen and cause DIPIPM erroneous operation.
To avoid such problem, line ripple voltage should meet dV/dt
≤
+/-1V/
μ
s, Vripple
≤
2Vp-p.
(12) For DIPIPM, it isn't recommended to drive same load by parallel connection with other phase IGBT or other DIPIPM.
Power GND wiring
Control GND wiring
M
MC
U
C2
15V
VD
C4
R1
Shunt resistor
N1
B
C
5V
A
+
U
N
(21)
V
N
(22)
W
N
(23)
Fo(24)
V
N1
(28)
V
NC
(27)
P
U
W
NU
LVIC
V
CIN(26)
NV
NW
IGBT1
IGBT2
IGBT3
IGBT4
IGBT5
IGBT6
Di1
Di2
Di3
Di4
Di5
Di6
C1
D
CFO(25)
D1
C3
+
R2
V
OT
(20)
5.1k
Ω
W
P
(18)
V
WFB
(15)
V
WFS
(13)
C1 D1 C2
+
V
P1
(16)
C2
HVIC
V
P
(12)
V
VFB
(9)
V
VFS
(7)
C1 D1 C2
+
V
P1
(10)
C2
HVIC
U
P
(6)
V
UFB
(3)
V
UFS
(1)
C1 D1 C2
+
V
P1
(4)
C2
HVIC
