Section 14: Main Color Board Digital Theory of Operation
14-37
14.17.23 SYNC_ALARM CIRCUIT
The power supply board requires a 50 kHz signal to generate the various
voltages in the system. A 100 kHz, 50 percent duty cycle signal is programmed
in the 386EX TIMER 1 unit. It enters the FPGA on pin 119 and is divided by 2
to get 50 kHz. This is anded with the WDT (pin 62) signal from the 386EX.
The WDTDETFF is held reset until enabled by WDTEN. If the WDT should
time out the WDTDETFF flip flop is set and disables the 50 kHz
SYNC_ALARM signal from going to the power supply, which will generate an
EARLEY WARNING signal to the 386EX and then shut off power to the main
board.
14.17.24 FE_CLK_100KHZ
This circuit feeds the 100 kHz clock from TIMER1 to pin 129 to the front end
for its power supply. It is enabled by FE_CLK_EN from the CONTROL
REGISTER as described earlier. The 100 kHz is not divided, the TIMER1
counter must be set into a mode which produces a 50 percent duty cycle square
wave.
14.17.25 KNOB ROTATION DETECT
The rotating knob on the front of the unit has an optical interface. Five volts are
supplied to it and it generates 2 signal channels (A and B) which are input to the
FPGA on pins 163 and 164. When the knob rotates clockwise the square wave
on CHANNEL A leads the square wave on CHANNEL B by 90 degrees. When
rotating counter clockwise, CHANNEL B leads CHANNEL A by 90 degrees.
This circuit exclusively ors the channels and generates an edge each time a
channel input changes state. One flip flop is set on the rising edge and another is
set on the trailing edge. These 2 flip flops are or’ed together and exit on pin 100,
which is for debugging purposes only. The software polls the status register and
if the KNOB INTERRUPT is high in bit 7 of hex address 30A, software reads
the status of the 2 input channels in bits 4 and 5 of the same register. Software
keeps track of these bits and can determine which one changes first to determine
the direction. The software to keep up with the knob rotation and in which
direction it is turning.
14.18 BLOCK DIAGRAM
The following diagram is a block diagram of the digital section of the LNA color
design.
Содержание NELLCOR NPB-4000
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