Mallinckrodt NELLCOR NPB-4000, Руководство по обслуживанию

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Section 14: Main Color Board Digital Theory of Operation
14-15
14.8.3 LCD AND 386EX INTERFACE
The LCD display chip interfaces directly with the 386EX. When the 386EX
initiates a transfer to the 1354F0A, the 386EX generates two wait states and
terminates the cycle when the WAIT# signal of the 1354 returns high. This is
true for transfers to the 1354F0A’s Video Memory or control registers.
14.8.4 LCD CONTRAST CIRCUIT
There is no contrast adjustment for this TFT display. The contrast circuitry is
not being used.
Pressing the Contrast switch on the front of the NPB-4000C causes the
background color to change from a black background to a white background.
14.8.5 BACKLIGHT CIRCUIT
The backlight of the LCD display is a CCFL (cold cathode fluorescent light) and
is turned on and off by a digital control bit in the FPGA Control Register. When
power is applied it is reset to 0. The backlight requires an AC high voltage
which is generated by an inverter, which takes 12 volts DC and generates the AC
voltage. When software wants the backlight on it sets this bit and it turns on
FET Q1, which completes the circuit to ground and allows the inverter to
generate the AC voltage. Resetting this bit breaks the ground connection and
inhibits the AC signal to the backlight.
14.9 REAL TIME CLOCK (RTC)
The RTC is a Dallas DS1693 which has the crystal and battery imbedded in the
unit. It is a 28 pin DIP package and runs from a 3.3 volt DC supply.
CS3# is assigned to the RTC in the I/O space and the software must assign 14
wait states to this unit.
The timing for the DS1693 is shown below.
Figure 14-8: DS1693 Timing
The timing for this interface is done in the FPGA. There is a state machine
which is clocked at 20 MHz and generates 18 states.