Figure 49. Processor and memory module layout: processor 3 and 4
Table 53. Processor and memory module layout: processor 3 and 4
1
Processor 3
4
DIMM 43-48
2
DIMM 31-42
5
DIMM 25-30
3
Processor 4
Table 54. Channel and slot information of DIMMs around a processor
Slot
0
1
0
1
0
1
Processor
1
0
1
0
1
0
Channel
Channel 2
Channel 1
Channel 0
Channel 0
Channel 1
Channel 2
DIMM number
(Processor 1)
1
2
3
4
5
6
7
8
9
10
11
12
DIMM number
(Processor 2)
13
14
15
16
17
18
19
20
21
22
23
24
DIMM number
(Processor 3)
25
26
27
28
29
30
31
32
33
34
35
36
DIMM number
(Processor 4)
37
38
39
40
41
42
43
44
45
46
47
48
Memory sparing guidelines:
• The spare rank must have identical or larger memory capacity than all of the other active memory ranks on
the same channel.
• If installing DIMMs that are one rank, follow the population sequences listed below.
• If installing DIMMs with more than one rank, follow population sequences specified for independent
memory mode. See
“Independent memory mode” on page 59
.
The memory sparing DIMM population sequences for each supported processor configuration are:
•
“Installation order: memory sparing with two processors” on page 75
•
“Installation order: memory sparing with four processors” on page 76
Note:
This mode only applies to single-rank memory modules. When installing DIMMs consisting of more
than two ranks, including dual-rank, quad-rank or octal-rank memory modules, refer to
instead.
.
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