C
REATING
C
USTOM
C
OMPONENTS
IN
L
ATTICE
M
ICO
S
YSTEM
:
Custom Component Example
94
LatticeMico32 Hardware Developer User Guide
//
//---------------------------------------------------------------------
wb_intr,//------------------Interrupt request from slave
//---------------------------------------------------------------------
//
// External pins exposed by this component
//
//---------------------------------------------------------------------
out_pins//------------------Output pins
);
input wb_reset;
input wb_clk;
input [31:0] wb_adr;
input [31:0] wb_master_data;
input wb_cyc;
input wb_stb;
input [3:0] wb_sel;
input wb_we;
output [31:0] wb_slave_data;
output wb_ack;
output wb_err;
output wb_rty;
output wb_intr;
output [7:0] out_pins;
//------------------------------------------------------------------------
//
// Registers
//
// reg_00 : read/write 32-bit register, general purpose
//
// reg_04 : read-only 32-bit register that contains the WISHBONE
// platform clock frequency (MHz)
//
// reg_08 : read-only register that contains a constant specified when
// instantiating this component in a platform
//
//------------------------------------------------------------------------
reg [31:0] reg_00;//------------------------32-bits, RW, offset 0
reg [31:0] reg_04;//------------------------32-bits, RW, offset 4
//reg_08 constant ------------------------32-bits, RO, offset 8
reg write_ack;//-----------------------------write-ack
//------------------------------------------------------------------------
//
// Wires
//
//------------------------------------------------------------------------
wire reg_00_sel;//---------------------------reg_00 selected
wire reg_04_sel;//---------------------------reg_04 selected
wire reg_08_sel;//---------------------------reg_08 selected
wire read_ack;//-----------------------------read-ack
wire [31:0] read_data;//---------------------reg data mux (reads)
//
// assign register-select signals:
// since there are only two registers, use bit-2 of the
// address bus since addressing is word addressing for LatticeMico32
//
Figure 47: Verilog (.v) File (Continued)
