4
Introduction
1.3.2
Timebase
1.3.3
Triggers
Sample Clock
Detail
Comment
Timebase options
Internal : onboard crystal
oscillator
External : CLK IN (front panel)
Sampling clock
frequency
Internal : 80MHz
1.22kS/s to
80MS/s
m
p
p
5
2
±
<
y
c
a
r
u
c
c
a
e
s
a
b
e
m
i
T
External reference
clock source
REF_CLK (supported by
PCI-
69834P
only)
External reference
clock
z
H
M
0
1
External reference
clock input range
3.3V to 5V TTL
DC compliant
Trigger Source & Mode
Trigger source
Software, external digital trigger, analog trigger, and SSI
(system synchronized interface)
Trigger mode
Post trigger, delay trigger, pre-trigger, or middle trigger,
re-trigger for post trigger and delay trigger modes
Digital Trigger Input
Sources
Front panel SMB connector
Compatibility
3.3 V TTL, 5 V tolerant
Input high threshold
2.0 V
Input low threshold (VIL) 0.8 V
Maximum input overload -0.5 V to +5.5 V
Trigger polarity
Rising or falling edge
Содержание PCIe-69834
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