JYTEK PCIe-69834, Руководство пользователя

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List of Figures vii
List of Figures
Figure 1-1: Analog Input Channel Bandwidth ............................... 3
Figure 1-2: PCIe-
69834
Schematic............................................... 7
Figure 1-3: PCIe-
69834
I/O Array ................................................. 8
Figure 3-1: Analog Input Architecture ......................................... 13
Figure 3-2: Linked List of PCI Address DMA Descriptors ........... 16
Figure 3-3: Trigger Architecture .................................................. 17
Figure 3-4: External Digital Trigger ............................................. 18
Figure 3-5: Post-Trigger Acquisition ........................................... 19
Figure 3-6: Delayed Trigger Mode Acquisition............................ 19
Figure 3-7: Pre-Trigger Mode Acquisition ................................... 20
Figure 3-8: Middle Trigger Mode Acquisition .............................. 20
Figure 3-9: Re-Trigger Mode Acquisition .................................... 21
Figure 3-10: PCIe-
69834
Clock Architecture ................................ 21
Figure 3-11: Timebase Architecture.............................................. 23
Figure 3-12: Basic Digitizer Acquisition Timing............................. 24
Figure 3-13: Varying Sampling Rates by Adjusting Scan
Interval Counter ........................................................ 24
Figure 3-14: Card Number Configuration Switch .......................... 27
Figure 3-15: Flash Memory Configuration Switch......................... 29
Figure 3-16: Waveform Transition ................................................ 30
Figure A-1: Auto-Calibration Block Diagram ............................... 36
Figure A-2: Auto-Calibration Flow ............................................... 37