JVL MAC00-EC4, Руководство пользователя

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JVL Industri Elektronik A/S - User Manual - Ethernet for MAC and MIS motors 279
12.3 Motor registers MAC400 - 4500
TT1504GB
Reg.
Nr. Firmware /
MacRegIo Name MacTalk
Name Range/
Default
Size /
Access
Unit Description
36 CNTRL_BITS
(not
present)
Na /
32
Word /
RW
- Bit 0, RECORDBIT
Set by the user to start or continue the sampling of register values,
using the Classic scope system. This bit will clear itself when the
sample buffer has been filled.
Bit 1, REWINDBIT
If set, the index into the sample buffer will be zeroed and sampling will
continue if in progress. This bit is typically set together with
RECORD_BIT above.
Bit 2, RECINNERBIT
If set, the samplinG7scope system samples at 100 microseconds
between samples instead of the normal 1.3milliseconds.
Normally
used only for internal JVL development and service purposes.
Bit 3, RELPOSPSOLL
Bit 4, RELPOSPFNC
These two bits select what happens if one of the general-purpose
position registers, P1 through P8 is ‘activated’ by a FastMac
command. If one of these is set, this activates a relative movement
rather than the absolute position move that happens if none of these
bits are set. If RELPOSPSOLL is set alone, the value of the selected
P1-P8 register is added to the target position register Reg3, P_SOLL.
If RELPOSPFNC is set, the value of the selected P1-P8 is added to
an internal variable that will generate the movement, leaving P_SOLL
unchanged. This is used for ‘endless relative’ movements, since it will
not cause any overflow of the target position, but note that the actual
position will wrap around at +/-2^31 (2,147,483,648 counts) without
problems for the movement.
Note that these bits also control the movements in Analogue Bi-
position mode in similar ways.
Bit 5, SYNCPOSAUTO
If set when switching mode from Passive mode into an active mode,
The follow error and the function error are zeroed, and the actual
position
is transferred to the P_FNC register, to avoid initial
movement.
Bit 6, SYNCPOSMAN
Set to manually synchronize the position by copying the value
of P_NEW, to P_IST, P_SOLL, and P_FNC, with proper
scaling.
In other words, set:
P_IST = P_NEW,
P_SOLL = P_NEW,
P_FNC = (P_NEW + FLWERR)*16.
See also bit 8 below.
Note that this operation is performed as an atomic
(unbreakable) operation, and is currently the only way to
perform this perfect synchronization.
Bit 7, MAN_NO_BRAKE
Bit 8, SYNCPOSREL
When set, modifies the manual synchronization performed by
bit 6 above to use relative synchronization rather than
absolute synchronization. In other words, set:
P_IST = P_IST + P_NEW,
P_SOLL = P_NEW,
P_FNC = P_FNC + (P_NEW + FLWERR)*16.