REL1.0
Page 21 of 58
iWave Systems Technologies Pvt. Ltd.
Zynq-7000 SoC SODIMM Development Platform Hardware User Guide
Pin
No.
SODIMM Edge Connector
Pin Name
Signal Type/
Termination
Description
155
PL_IO_L6N_T0_VREF_35
IO, 3.3V LVCMOS
Bank35 User I/O Single ended pin.
This pin is connected to 3
rd
pin of Pmod
connector1 (J3).
Note: Optionally this pin is connected to K20
th
pin
of FMC connector (J1) through resistor and default
not populated.
156
PL_IO_L16P_T2_35
IO, 3.3V LVCMOS
Bank35 User I/O Single ended pin.
This pin is connected to 3
rd
pin of Pmod
connector2 (J5).
Note: Optionally this pin is connected to E15
th
pin
of FMC connector (J1) through resistor and default
not populated.
157
PL_IO_25_35
IO, 3.3V LVCMOS/
10K PU
Bank35 User I/O Single ended pin.
This pin is used to indicate the USB over current
condition from USB power switch.
Note: Optionally this pin is connected to H2
nd
pin
of FMC connector (J1) through resistor and default
not populated.
158
PL_IO_L12N_T1_MRCC_35 O, 3.3V LVCMOS
Bank35 Clock user Multi region negative Single
ended pin.
This pin is connected to J3
rd
pin of FMC connector
(J1).
159
PL_IO_L14N_T2_AD4N_SR
CC_35
O, 3.3V LVCMOS
Bank35 Clock user Single region negative Single
ended pin.
This pin is connected to D9
th
pin of FMC
connector (J1).
160
VIN_3V3
O, 3.3V Power
Supply Voltage.
161
PL_IO_L6P_T0_35
IO, 3.3V LVCMOS
Bank35 User I/O Single ended pin.
This pin is connected to 1
st
pin of Pmod
connector1 (J3).
Note: Optionally this pin is connected to J18
th
pin
of FMC connector (J1) through resistor and default
not populated.
162
PL_IO_L17P_T2_AD5P_35
IO, 3.3V LVCMOS
Bank35 User I/O Single ended pin.
This pin is connected to G27
th
pin of FMC
connector (J1).
163
PL_IO_L24N_T3_AD15N_3
5
IO, 3.3V LVCMOS
Bank35 User I/O Single ended pin.
This pin is connected to G34
th
pin of FMC
connector (J1).
164
PL_IO_L17N_T2_AD5N_35
IO, 3.3V LVCMOS
Bank35 User I/O Single ended pin.
This pin is connected to G28
th
pin of FMC
connector (J1).