REL1.0
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iWave Systems Technologies Pvt. Ltd.
Zynq-7000 SoC SODIMM Development Platform Hardware User Guide
Pin
No.
SODIMM Edge Connector
Pin Name
Signal Type/
Termination
Description
67
PL_IO_L11N_T1_SRCC_34
O, 3.3V CMOS
Bank34 Clock user Single region negative Single
ended pin.
This pin is connected to G3
rd
pin of FMC
connector (J1).
68
PL_IO_L7P_T1_34
IO, 3.3V LVCMOS
Bank34 User I/O Single ended pin.
This pin is connected to C10
th
pin of FMC
connector (J1).
69
PL_IO_L11P_T1_SRCC_34
O, 3.3V LVCMOS
Bank34 Clock user Single region positive Single
ended pin.
This pin is connected to G2
nd
pin of FMC
connector (J1).
70
PL_IO_L17P_T2_34
IO, 3.3V LVCMOS
Bank34 User I/O Single ended pin.
This pin is connected to C14
th
pin of FMC
connector (J1).
71
PL_IO_L6N_T0_VREF_34
IO, 3.3V LVCMOS
Bank34 User I/O Single ended pin.
This pin is connected to 10
th
pin of Pmod
connector2 (J5).
Note: Optionally this pin is connected to K17
th
pin
of FMC connector (J1) through resistor and default
not populated.
72
VIN_3V3
O, 3.3V Power
Supply Voltage.
73
PL_IO_L6P_T0_34
IO, 3.3V LVCMOS
Bank34 User I/O Single ended pin.
This pin is connected to 9
th
pin of Pmod
connector2 (J5).
Note: Optionally this pin is connected to F13
th
pin
of FMC connector (J1) through resistor and default
not populated.
74
PL_IO_L17N_T2_34
IO, 3.3V LVCMOS
Bank34 User I/O Single ended pin.
This pin is connected to C15th pin of FMC
connector (J1).
75
PL_IO_0_34
IO, 3.3V LVCMOS
Bank34 User I/O Single ended pin.
This pin is connected to 9th pin of Pmod
connector1 (J3).
Note: Optionally this pin is connected to C30
th
pin
of FMC connector (J1) through resistor and default
not populated.
76
PL_IO_25_34
IO, 3.3V LVCMOS
Bank34 User I/O Single ended pin.
This pin is connected to 7th pin of Pmod
connector2 (J5).
Note: Optionally this pin is connected to C31
st
pin
of FMC connector (J1) through resistor and default
not populated.