Technical Reference
Dual-Core Intel® Xeon® Processor LV and Intel
®
3100 Chipset
User’s Manual
January 2007
46
Order Number:315879-002
NN
Intruder Detect Header
J3B2
Optional Intruder Switch Header
1: MICH_INTRUDER HDR_N
2: GND
Open
Do not short
R
CPU_GTLREF Header
J7H2
Access to CPU_GTLREF
1: Ground
2: CPU_GTLREF
Open
Do not short
L
Processor Thermal Diode
Header
J9F2
Access to CPU Thermal Diode
1: CPU_THRM_DC
2: CPU_THRM_DA
3: Ground
Open
Do not short
K
Intel
®
3100 Chipset Thermal
Diode Header
J9F1
Access to Intel
®
3100 Chipset Thermal Diode
1: MICH_THRM_DC
2: MICH_THRM_DA
3: Ground
Open
Do not short
P
Processor BPM0 Inject Header
J9J1
Inject CPU BPM0 Signal
1: CPU_BPM0 input (apply 3.3 V here)
2: Ground
Open
Do not short
O
Processor BPM3 Inject Header
J9H4
Inject CPU BPM3 Signal
1: CPU_BPM0 input (apply 3.3 V here)
2: Ground
Open
Do not short
V
Stop Clock Inject Header
J5G1
Inject IMCH_STPCLK_N Signal
1: IMCH_STPCLK_N input (apply 3.3 V here)
2: Ground
Open
Do not short
I
Intel
®
3100 Chipset DDR V
REF
Header (validation Only)
J7C1
Access to DDR V
REF
1: DDR_MICH_VREF
2: Ground
Open
Do not short
U
Intel
®
3100 Chipset FSB Vref
Header (validation Only)
J7G1
Access to FSB_VREF
1: FSB_VREF
2: Ground
Open
Do not short
J
DDR DIMM Vref Header
(validation Only)
J7C2
Access to DDR_DIMM_VREF
1: DDR_DIMM_VREF
2: Ground
Open
Do not short
II
Wake Event Header
J4D1
Wake Event Header
1: FP_SLP_HDR_N
2: Ground
Open
Do not short
BB
VSBY SMBUS Segment Header
J2G6
SMBUS Access Header
1: SMB_DATA
2: GND
3: SMB_CLK
Open
Do not short
EE
PCI SMBUS Segment Header
J2G5
SMBUS Access Header
1: SMB_DATA
2: GND
3: SMB_CLK
Open
Do not short
Z
IMCH SMBUS Segment Header
J2G3
SMBUS Access Header
1: SMB_DATA
2: GND
3: SMB_CLK
Open
Do not short
Table 17.
Jumper Block Locations (Sheet 2 of 3)
Location
Jumper/Header Name
Ref Des
Description
Default
Position