Intel® Server Board S5500HV/Intel® Server System SR1670HV TPS
Functional Architecture
15
Intel Confidential
Revision 1.2
Intel order number E69391-006
The memory slots associated with a given processor are unavailable if the given
processor socket is not populated.
A processor may be installed without populating the associated memory slots provided a
second processor is installed with associated memory. In this case, the memory is
shared by the processors. However, this is not a recommended configuration due to the
associated latency which will affect performance.
Processor sockets are self-contained and autonomous. However, all memory subsystem
support (i.e., Memory RAS, Error Management, etc.) in the BIOS setup are applied
commonly across processor sockets.
3.2.1.1
Memory Population Rules
DIMM population requirements are dependent upon the number of slots per channel; the
number of DIMMs installed; and rank type. When installing memory consider the following:
Populate DIMMs by channel starting with the Blue slot farthest from the CPU
All channels in a system will run at the fastest common frequency
RDIMMs and UDIMMs may not be mixed
If two 1333 MHz capable UDIMMs or RDIMMs is detected in the same channel, BIOS
will flag this as a warning and force the speed down to 1066 MHz.
3.2.1.1.1
Supported RDIMM configurations:
Table 3 Supported RDIMM configurations
DIMM Slots
per Channel
DIMMs Populated
per Channel
DIMM Type
Speeds
Ranks per
DIMM
Population Rules
2 1
Registered
DDR3 ECC
800,
1066,
1333
SR or DR
2 1
Registered
DDR3 ECC
800, 1066
QR Only
2 2
Registered
DDR3 ECC
800, 1066
Mixing SR,
DR
2 2
Registered
DDR3 ECC
800 Mixing
SR,
DR, QR
1. Any combination of x4 and x8
RDIMMs, with 1Gb or 2Gb DRAM
density
256 Mb, 512 Mb and 4 Gb DRAM technologies and x16 DRAM on RDIMM are NOT
supported
If a quad rank RDIMM is mixed with a single rank or dual rank DIMM on given channel,
the quad rank DIMM must be populated in the lowest numbered slot.
