Intel® Server Board S5500HV/Intel® Server System SR1670HV TPS
Functional Architecture
11
Intel Confidential
Revision 1.2
Intel order number E69391-006
Turbo boost operation:
Operates under OS control – only entered when OS requests higher performance state
(P0).
Turbo Boost availability is independent of the number of active cores
Max Turbo boost frequency is dependent on the number of active cores and varies by
processor configuration.
Amount of time the system spends in Turbo Boost will depend on the workload,
operating environment, and platform design.
Turbo Boost can be enabled or disabled by BIOS.
3.1.1.6
Integrated Memory Controller
The Intel
®
5500 Chipset Series employs a new design where the memory controller, referred to
as the Intel
®
QuickPath Memory Controller, is now embedded as part of the processor
architecture.
The Intel
®
QuickPath Memory Controller provides up to three memory channels per processor
supporting up to 32 GB/s bandwidth per memory controller. Supported memory follows the
DDR3 specification and supports the following characteristics:
800MHz, 1066MHz and 1333MHz operating frequencies
Single-rank (SR), dual-rank (DR) and quad-rank (QR)
Registered DIMM (RDIMM) or Unbuffered DIMM (UDIMM)
3.1.2
Processor Population Rules
Note:
Although the server board does support dual-processor configurations consisting of
different processors that meet the defined criteria below, Intel does not perform validation
testing of this configuation. For optimal system performance in dual-processor configurations,
Intel recommends that identical processors be installed.
When using a single processor configuration, the processor can be installed into either CPU1 or
CPU2 processor sockets.
When two processors are installed, the following population rules apply:
Both processors must have the same Intel
®
QuickPath Interconnect frequency
Both processors must have the same core frequency
Both processors must have the same internal cache sizes
Both processors must have the same Thermal Design Power (TDP - Watts) rating
Processor stepping within a common processor family can be mixed as long as it is
listed in the processor specification updates published by Intel Corporation.
3.1.3
Unified Retention System Support
The server board complies with Intel’s Unified Retention System (URS) and the Unified
Backplate Assembly. The server board ships with a made-up assembly of Independent Loading
Mechanism (ILM) and Unified Backplate for each processor socket.
