Intel
®
Server System SR1600UR Service Guide
117
0xEDh
O
O
O
X
O
O
X
O
Population Error: RDIMMs and UDIMMs
cannot be mixed in the system
0xEEh
O
O
O
X
O
O
O
X
Mismatch Error: more than 2 Quad
Ranked DIMMS in a channel.
Memory Reference Code Progress Codes (Not accompanied by a beep code)
0xB0h
O
X
O
O
X
X
X
X
Chipset Initialization Phase
OxB1h
O
X
O
O
X
X
X
O
Reset Phase
0xB2h
O
X
O
O
X
X
O
X
DIMM Detection Phase
0xB3h
O
X
O
O
X
X
O
O
Clock Initialization Phase
0xB4h
O
X
O
O
X
O
X
X
SPD Data Collection Phase
OxB6h
O
X
O
O
X
O
O
X
Rank Formation Phase
0xB8h
O
X
O
O
O
X
X
X
Channel Training Phase
0xB9h
O
X
O
O
O
X
X
O
Memory Test Phase
0xBAh
O
X
O
O
O
X
O
X
Memory Map Creation Phase
0xBBh
O
X
O
O
O
X
O
O
RAS Initialization Phase
0xBFh
O
X
O
O
O
O
O
O
MRC Complete
Host Processor
0x04h
X
X
X
X
X
O
X
X
Early processor initialization where
system BSP is selected
0x10h
X
X
X
O
X
X
X
X
Power-on initialization of the host
processor (bootstrap processor)
0x11h
X
X
X
O
X
X
X
O
Host processor cache initialization
(including AP)
0x12h
X
X
X
O
X
X
O
X
Starting application processor
initialization
0x13h
X
X
X
O
X
X
O
O
SMM initialization
Table 8. Diagnostic LED POST Code Decoder
Checkpoint
Diagnostic LED Decoder
Description
O=On; X=Off
Upper Nibble
Lower Nibble
MSB
LSB
8h
4h
2h
1h
8h
4h
2h
1h
LED
#7
#6
#5
#4
#3
#2
#1
#0
Содержание SR1600UR - Server System - 0 MB RAM
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