Intel® Atom® Processor C2000 Product Family BIOS Post/Error
Codes
Getting Started Guide
77
A.3
Memory Reference Codes (MRC) Post Codes
Table 13.
MRC Post Codes
Post Code
Description
0x10
Enable HPET
0x11
Update Variables
0x12
Enable Clock Gating
0x13
Clear Self Refresh
0x14
Oem Track Init Complete
0x42
Prog Ddr Timing Control
0x43
Prog Bunit
0x44
Prog Bl Mode
0x50
Handle Ddrio Phy Init
0xA0
MMRC SFR Vol Sel
0xA1
MMRC PLL Init
0xA2
MMRC DDR Static Init 2
0xA3
MMRC DDR Static Init Perf
0xA4
MMRC DDR Static Pwr Clk Gating
0xA7
MMRC DLL Init
0xA8
MMRC Comp Init 1
0xAA
MMRC Comp Init 2
0xAB
MMRC Periodic Comp Init
0xAC
MMRC HMC Init
0xAD
MMRC Wr Pointer Init
0xAE
MMRC IO BUF ACT Init
0xAF
MMRC Pre Jedec Init
0xB0
MMRC DDR3 Reset
0x61
Prog Dra Drb
0x62
Prog Memory Mapping Register
0x71
Perform D-unit Wake
0x81
Pre Jedec Init
0x82
Perform Jedec Init
0x83
Post Jedec Init
0x90
Disconnect BD
0x91
Disable Pmi
0x92
Disable B-unit Cache