CLOCK GENERATION AND POWER MANAGEMENT
5-12
Figure 5-9. Power-Save Register
Register Name:
Power Save Register
Register Mnemonic:
PWRSAV
Register Function:
Enables and sets clock division factor.
Bit
Mnemonic
Bit Name
Reset
State
Function
PSEN
Power Save
Enable
0H
Setting this bit enables Power Save mode and
divides the internal operating clock by the value
defined by F1:0. Clearing this bit disables
Power-Save mode and forces the CPU to
operate at full speed. PSEN is automatically
cleared whenever an interrupt occurs.
F1:0
Clock
Division
Factor
0H
These bits control the clock division factor used
when Power Save mode is enabled. The
allowable values are listed below:
F1 F0 Divisor
0
0
By 1 (undivided)
0
1
By 4
1
0
By 8
1
1
By 16
NOTE:
Reserved register bits are shown with gray shading. Reserved bits must be written
to a logic zero to ensure compatibility with future Intel products.
A1130-0A
15
0
F
1
F
0
P
S
E
N
Содержание 80C186XL
Страница 1: ...80C186XL 80C188XL Microprocessor User s Manual...
Страница 2: ...80C186XL 80C188XL Microprocessor User s Manual 1995...
Страница 18: ...1 Introduction...
Страница 19: ......
Страница 27: ......
Страница 28: ...2 Overview of the 80C186 Family Architecture...
Страница 29: ......
Страница 79: ......
Страница 80: ...3 Bus Interface Unit...
Страница 81: ......
Страница 127: ......
Страница 128: ...4 Peripheral Control Block...
Страница 129: ......
Страница 137: ......
Страница 138: ...5 ClockGenerationand Power Management...
Страница 139: ......
Страница 154: ...6 Chip Select Unit...
Страница 155: ......
Страница 178: ...7 Refresh Control Unit...
Страница 179: ......
Страница 193: ......
Страница 194: ...8 Interrupt Control Unit...
Страница 195: ......
Страница 227: ......
Страница 228: ...9 Timer Counter Unit...
Страница 229: ......
Страница 253: ......
Страница 254: ...10 Direct Memory Access Unit...
Страница 255: ......
Страница 283: ......
Страница 284: ...11 Math Coprocessing...
Страница 285: ......
Страница 302: ...12 ONCE Mode...
Страница 303: ......
Страница 306: ...A 80C186 Instruction Set Additions and Extensions...
Страница 307: ......
Страница 318: ...B Input Synchronization...
Страница 319: ......
Страница 322: ...C Instruction Set Descriptions...
Страница 323: ......
Страница 371: ......
Страница 372: ...D Instruction Set Opcodes and Clock Cycles...
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Страница 396: ...Index...
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