Data Sheet
107
Rev. 1.00
2017-07-31
TLE9263BQXV33
Supervision Functions
Figure 47 Reset Timing Diagram
15.1.2
Soft Reset Description
In SBC Normal and SBC Stop Mode, it is also possible to trigger a device internal reset via a SPI command in
order to bring the SBC into a defined state in case of failures. In this case the microcontroller must send a SPI
command and set the
MODE
bits to ‘11’ in the
M_S_CTRL
register. As soon as this command becomes valid,
the SBC is set back to SBC INIT Mode and all SPI registers are set to their default values (see SPI
Chapter 16.5
and
Chapter 16.6
).
Two different soft reset configurations are possible via the SPI bit
SOFT_ RESET_RO
:
•
The reset output (RO) is triggered when the soft reset is executed (default setting, the same reset delay time
t
RD1
applies)
•
The reset output (RO) is not triggered when the soft reset is executed
Note:
The device must be in SBC Normal Mode or SBC Stop Mode when sending this command.
Otherwise, the command will be ignored.
The reset threshold can be
configured via SPI in SBC
Normal Mode , default is V
RT1
t
RD1
t
LW
SBC Init
RO
SPI
t
VCC
V
RT1
undervoltage
t
RD1
SBC Normal
t
t
t
LW
t < t
RF
t
RF
t
CW
SBC Restart
SBC Normal
SPI
Init
t
CW
t
OW
WD
Trigger
t
CW
t
OW
WD
Trigger
SPI
Init
t
LW
= long open window
t
CW
= closed window
t
OW
= open window
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