Data Sheet
22
Rev. 1.00
2017-07-31
TLE9263BQXV33
System Features
5.1
Block Description of State Machine
The different SBC Modes are selected via SPI by setting the respective SBC
MODE
bits in the register
M_S_CTRL
. The SBC
MODE
bits are cleared when going through SBC Restart Mode and thus always show the
current SBC mode.
Figure 3
State Diagram showing the SBC Operating Modes
SBC Init Mode
*
(Long open window)
VCC1
ON
VCC2
OFF
VCC3
OFF
FOx
inact.
CAN
(3)
OFF
LINx
(3)
OFF
Wake up event
SPI cmd
SPI cmd
SPI cmd
Any SPI
command
WD trigger
First battery connection
VCC1
Undervoltage
Automatic
1st Watchdog Failure Config 2,
2nd Watchdog Failure, Config 4
VCC1 Short to GND
SBC Soft Reset
Reset is released
WD starts with long open window
(1) After Fail-Safe Mode entry, the device will stay for at least typ . 1s
in this mode (with RO low) after a TSD2 event and min. typ. 100ms
after other Fail-Safe Events. Only then the device can leave the
mode via a wake-up event. Wake events are stored during this time.
(2) according to VCC3 configuration
(3) For SBC Development Mode CAN/LINx/VCC2 are ON in SBC Init
Mode and stay ON when going from there to SBC Normal Mode
(4) See chapter CAN & LIN for detailed behavior in SBC Restart Mode
(5) See Chapter 5.1.5 and 14.1 for detailed FOx behavior
WD
Config.
HSx
OFF
SBC Normal Mode
VCC1
ON
VCC2
config.
VCC3
config.
FOx
act/inact
CAN
(3)
config.
LINx
(3)
config.
WD
config.
HSx
config.
SBC Sleep Mode
VCC1
OFF
VCC2
fixed
FOx
fixed
CAN
Wake
capable /off
LINx
Wake
capable /off
WD
OFF.
HSx
fixed
SBC Stop Mode
VCC1
ON
VCC2
fixed
VCC3
fixed
FOx
fixed
CAN
fixed
LINx
fixed
WD
fixed
HSx
fixed
SBC Restart Mode
(RO pin is asserted)
VCC1
ON/
ramping
VCC2
OFF
FOx
(5)
active/
fixed
CAN
(4)
woken /
OFF
WD
OFF
HSx
OFF
SBC Fail-Safe Mode
(1)
VCC1
OFF
VCC2
OFF
VCC3
OFF
FOx
(5)
active
CAN
Wake
capable
WD
OFF
HSx
OFF
Config.
: settings can be
changed in this SBC mode ;
Fixed:
settings stay as defined
in SBC Normal Mode
TSD2 event,
LINx
Wake
capable
LINx
(4)
woken /
OFF
VCC3
(2)
fixed/
ramping
VCC3
(2)
Fixed /
OFF
*
The
SBC Development Mode
is a super set of state machine
where the WD timer is stopped
and CAN /LINx behavior differs
in SBC Init Mode . Otherwise,
there are no differences in
behavior.
Cyc. Wake
OFF
Cyc. Sense
OFF
Cyc. Wake
config.
Cyc. Sense
config.
Cyc. Wake
fixed
Cyc. Sense
fixed
Cyc. Wake
OFF
Cyc. Sense
fixed
Cyc. Wake
OFF
Cyc. Sense
OFF
Cyc. Wake
OFF
Cyc. Sense
OFF
CAN, LINx, WKx wake-up event
OR
Release of over temperature
TSD2 after t
TSD2
VCC1 over voltage
Config 2/4 (if VCC_OV_RST set)
VCC1 over voltage
Config 1/3 (if VCC_OV_RST set)
Watchdog Failure:
Config 1/3 & 1st WD failure
in Config4
After 4x consecutive VCC1
under voltage events
(if VS > VS_UV)
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