Data Sheet
166
Rev. 1.00
2017-07-31
TLE9263BQXV33
Application Information
17
Application Information
17.1
Application Diagram
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
Figure 59 Simplified Application Diagram
C
1
R
13
C
15
VSHS
LIN1
S
1
VBAT
C
11
R
10
CANH
C
12
R
11
CANL
R
2
V
SS
V
DD
CSN
CLK
SDI
SDO
µC
INT
CSN
CLK
SDO
SDI
FOx
VCC1
C
4
V
CC1
C
5
WK1
HS1
VS
Reset
INT
RO
VCAN
GND
Q1
V
CC
GND
IC1
V
S
LOGIC
State
Machine
Application _information
_TLE9263 .vsd
V
S
T1
CANH
CANL
CAN cell
VBAT
VBAT
VS
TLE9263
V
S
VCC3REF
Q2
LIN1
LIN cell
HS2
HS3
VSHS
HS4
LH
V
CC2
WK3
WK2
R
1
S
2
R
4
S
3
R
6
R
5
R
3
Hall1
Hall2
Q1
Q2
Q1
Q2
D
1
C
7
R
8
D
3
Other loads , e.g.
sensor , opamp, ...
C
8
R
7
D
4
R
14
C
16
LIN2
LI N cell
VSHS
LIN2
TxD LIN2
RxD LIN2
TxD CAN
RxD CAN
TxD LIN2
RxD LIN2
TxD CAN
RxD CAN
TxD LIN1
RxD LIN1
TxD LIN1
RxD LIN1
VCC2
VSHS
VSHS
VSHS
VSHS
D
2
C
2
C
3
Note: The external capacitance on FO3/TEST must be
<=10nF in oder to ensure proper detection of SBC
Development Mode und SBC user mode operation
T
2
C
13
R
12
V
CC3
VCC3B
VCC3SH
C
14
C
9
C
10
C
6
V
CC2
D
6
D
5
R
9
C
17
C
18
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