5-5.
20/30 LOOP PHASE LOCK, A36, A38, A39, A40, AND A43
Reference
Performance Test:
Frequency Range and CW Mode Accuracy
Service Section: 20/30 Loops
Description
hase Lock Loop 2 is adjusted by selecting a very narrow span width and adjusting A40 and A43 for
proper voltages at designated test points. If PLL2 will not phase lock (UNLK indicator is lit and [SHIFT]
[EXTI diagnostic indicates N2 is at fault), the A41 PLL2 Phase Detector must be disabled and a slightly
different procedure used to initially set the A40 and A43 adjustments.
Phase
Lock Loop 3 is adjusted for maximum multiplier output level at 160 MHz. The VCO is adjusted
by setting up proper voltage levels at A39TP3.
Phase Lock Loop 1 40 kHz LPF is properly adjusted using a function generator and spectrum analyzer
with an active probe. The response of PLL1 is adjusted for maximum rejection of signals between 160
and 166 MHz using a signal generator and spectrum analyzer.
FREQUENCY
COUNTER
Figure 5-9.
20/30 Loop Phase Lock Adjustments Setup
HP 8340B/41B
Adjustments
5-27