Design-In - Electrical Aspects
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COMX Communication Modules | Design Guide
DOC100901DG18EN | Revision 18 | English | 2013-12 | Released | Public
© Hilscher, 2002-2013
3.1.9
Signals of the Host Interface – Serial Dual-Port Memory Mode
The COMX 10 and COMX 51 modules offer an SPI Slave interface which will be used for serial
access to the dual-port memory of the COMX. The general connection of the serial dual-port mem-
ory to any SPI capable host CPU is shown in the following figure.
Figure 12: Serial Dual-Port Memory Interface
The default SPI mode is mode 3, CPOL = 1 and CPHA = 1.
Timing Diagram Serial Dual-Port Memory Interface
To access the dual-port memory of the COMX 10 modules, see the timing diagram in section
Serial Mode IO Timing
in [5], pages 124 - 125.
To access the dual-port memory of the COMX 51 modules, see the timing diagram in section
Serial Mode IO Timing
in [6], pages 265 - 266.
Software implementation and Protocol
For information about the software implementation and the protocol see section
Host Software Im-
plementation
and section
Serial DPM Protocol Description
in [4].