Annex
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PC Cards cifX PCI, PCIe, Low Profile PCIe | Installation, Operation and Hardware Description
DOC120204UM36EN | Revision 36 | English | 2012-10 | Released | Public
© Hilscher, 2008-2012
Table 51: LEDs sercos Master
76
Table 52: LED State Definition for sercos Master for the STA and ERR LEDs
76
Table 53: LEDs sercos Slave
77
Table 54: LED State Definition for sercos Slave for the S3 LED
77
Table 55: LEDs VARAN Client
78
Table 56: LED State Definition for VARAN Client for the RUN and ERR LEDs
78
Table 57: LEDs PROFIBUS DP Master – 1 Communication LED (current Hardware Revision)
79
Table 58: LEDs PROFIBUS DP Slave – 1 Communication LED (current Hardware Revision)
79
Table 59: LEDs PROFIBUS MPI
80
Table 60: LEDs CANopen Master – 1 Communication LED (current Hardware Revision)
81
Table 61: LED State Definition for CANopen Master for the CAN LED
81
Table 62: LEDs CANopen Slave – 1 Communication LED (current Hardware Revision)
82
Table 63: LED State Definition for CANopen Slave for the CAN LED
82
Table 64: LEDs DeviceNet Master
83
Table 65: LEDs DeviceNet Slave
83
Table 66: LEDs AS Interface Master
84
Table 67: LEDs CC-Link Slave
84
Table 68: LEDs CompoNet Slave
85
Table 69: Ethernet Pin Assignment at the RJ45 Socket for cifX or AIFX
86
Table 70: Ethernet Connection Data
87
Table 71: Use of Hubs and Switches
87
Table 72: PROFIBUS Interface, X400
88
Table 73: CANopen Interface, X400
88
Table 74: DeviceNet Interface, X360
89
Table 75: AS-Interface Interface
89
Table 76: CC-Link Interface
90
Table 77: CompoNet Interface
90
Table 78: Rotary Switch for Slot Number (Card ID), S1
91
Table 79: Rotary Switch Slot Number (Card ID) PC Cards cifX Low Profile PCI Express
92
Table 80: Pin Assignment for SYNC Connector, X51
93
Table 81: Pin Assignment for SYNC Connector, J3
93
Table 82: SYNC Connector: SYNC Signal, Connector, Max. Cable Length
94
Table 83: Meaning of the SYNC Signals for each Protocol
94
Table 84: Pin Assignment at the Bus
95
Table 85: References to the Standard Bus Specifications PCI, PCI Express
95
Table 86: Pin Assignment for PCI Express-Bus CIFX 100EH-RE\CUBE
96
Table 87: Technical Data CIFX 50-RE
97
Table 88: Technical Data CIFX 50-DP
98
Table 89: Technical Data CIFX 50-2DP
98
Table 90: Technical Data CIFX 50-CO
99
Table 91: Technical Data CIFX 50-DN
99
Table 92: Technical Data CIFX 50-2ASM
100
Table 93: Technical Data CIFX 50-CC
100
Table 94: Technical Data CIFX 50-CP
101
Table 95: Technical Data CIFX 50E-RE
102
Table 96: Technical Data CIFX 50E-DP
103
Table 97: Technical Data CIFX 50E-CO
103
Table 98: Technical Data CIFX 50E-DN
104
Table 99: Technical Data CIFX 50E-2ASM
104
Table 100: Technical Data CIFX 50E-CC
105
Table 101: Technical Data CIFX 50E-CP
105
Table 102: Technical Data CIFX 100EH-RE\CUBE
106
Table 103: Technical Data CIFX 100EH-RE\CUBE
107
