CE5000-UM-251-9370 11-3
11 BLOCK DIAGRAMS AND CIRCUIT DIAGRAMS
11.2 Circuit Diagrams
11.2.1 Main Board Top Section (PN5043-01A)
PN5043-01A TOP
IF
IF
RESETZ
A[0..21]
USBINTZ
RDZ WRLZ
USBCSZ
D[0..15]
DSR0Z
RXD0
DTR-DZ
TXD0
CTS0Z
RTS-DZ
CLK6M
CONNECT
CONNECT
LCDB2(E)
PENB
PINCH
LCDB1(R/W)
R. MARK
KEYCONT2
LOCALLED
PENA
LOCALZ
CAM
MC+ MC-
KEYCONT0
YHOME
R. MARK-ANO
KEY[0..3]
LCDB0(RS)
LCDB[0..7]
KEYCONT1
R. MARK-OFT
MEMORY
MEMORY
D[0..15] A[0..21]
FR_BUSYZ
RASZ CASLZ CASHZ
RDZ
RDWR
EPROMOUT
RESETZ
CS0Z
WRLZ
NV_DI NV_CS NV_SK
FPGA
FPGA
D[0..15]
CS2Z
RDZ
LOCALZ
WRLZ
CS1Z
PNENA PNENB
YCOMA YCOMB
XCOMB
PNCOMB
LOCALINTZ
PNCOMA
SRVINTZ
XCOMA
SFRZ
LOCALLED
A[0..21]
USBCSZ
LCDB2(E)
LCDB0(RS) LCDB1(R/W)
R. MARK-ANO
FAN_ON
CLK6M
LCDB[0..7]
KCONT2
KCONT1
KCONT0
DIN CCLK INIT PROGRAM DONE
YHOME
KEY[0..3]
PINCH
CAM
FPGRES
DCDRIVER
DCDRIVER
XCOMA
SFRZ
YCOMA
XCOMB
YCOMB
DCMC-
PCOMA PCOMB
DCMC+
FAN_ON
CPU
CPU
RDZ
WRLZ
CS1Z
RDWR
CS0Z
CASHZ
RASZ CASLZ
A[0..21]
RXD0 TXD0
CTS0Z
DSR0
R. MARK
LOCALINTZ
USBINTZ
SRVOINTZ
D[0..15]
CS2Z
DTR-DZ RTS-DZ
EPROMDOUT
RESETZ
FR_BUSY
NV_SK
NV_CS
NV_DI
DIN
CCLK
INIT PROGRAM
DONE
R. MARK-OFT
FPGRES
FPGRES
RESETZ
USBINTZ
SRVOINTZ USBINTZ
LOCALINTZ
RESETZ
WRLZ
RDZ
RDZ WRLZ
A[0..21]
FR_BUSYZ
INIT PROGRAM CCLK DIN
USBCSZ
RESETZ
CLK6M
WRLZ
RDZ
R. MARK
EPROMOUT
MC+
MC+ MC-
MC-
LOCALINTZ
SRVOINTZ
CAM
PINCH
LOCALZ
D[0..15] A[0..21]
KEY[0..3]
FPGRES WRLZ PENA PENB
DIN CCLK INIT PROGRAM DONE
D[0..15]
DONE
A[0..21]
FR_BUSYZ EPROMOUT
RDZ
CS1Z CS2Z
YHOME CAM PINCH
CLK6M
USBCSZ
CS1Z CS2Z
D[0..15]
D[0..15]
LOCALZ
R. MARK
PENB
YHOME
PENA
KEY[0..3]
LCDB[0..7]
R. MARK-OFT
R. MARK-OFT
Содержание CE5000 SERIES
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Страница 114: ...CE5000 UM 251 9370 10 2 10 PARTS LIST Outer Casing 1 2 3 4 5 8 6 7 9 10 13 11 12 14 15 16 18 17 19 20 21...