Freescale Semiconductor SC140 DSP Core, Справочное руководство

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Address Generation Unit
SC140 DSP Core Reference Manual 2-45
2.3.4 Address Modifier Modes
The AAU supports linear, reverse-carry, modulo, and multiple wrap-around modulo arithmetic types for
address register indirect modes operating on R0-R7. These arithmetic types allow the easy creation of data
structures in memory for First-In/First-Out (FIFO) queues, delay lines, circular buffers, stacks, and
reverse-carry Fast Fourier Transform (FFT) buffers.
Data is manipulated by updating address registers (Rn) used as pointers rather than moving large blocks of
data. The contents of the modifier control register MCTL define the type of arithmetic to be performed for
address calculations. For modulo arithmetic, the address modifier register Mj specifies the modulus. Each
of the address register lower banks (R0–R7) can be used with any of the modifier registers (M0–M3) as
programmed in the MCTL register.
2.3.4.1 Linear Addressing Mode
Linear addressing is useful for general-purpose addressing such as stacks. In linear addressing mode, the
address is calculated using standard binary arithmetic. The entire memory space is addressable. Linear
addressing mode is selected by setting the AM3–0 bits to 0000 in the MCTL register. This is the default
state.
2.3.4.2 Reverse-carry Addressing Mode
Reverse-carry addressing is useful for 2
k
point FFT addressing. This mode is selected for R0-R7 by setting
the AM3-0 bits to 0001 in the MCTL register. Address modification is performed in the hardware by
propagating the carry from each pair of added bits in the reverse direction (from the MSB end toward the
LSB end). For the +Ni addressing mode, reverse-carry is equivalent to:
• Bit-reversing the contents of Rn (redefining the MSB as the LSB, the next MSB as bit 1, and so on)
• Shifting the offset value in Ni left by 0, 1, 2, or 3 according to the access width
• Bit-reversing the shifted Ni
• Adding normally
• Bit-reversing the result
This address modification is useful for addressing the twiddle factors in 2
k
point FFT addressing as well as
to unscramble 2
k
point FFT data. The range of values for Ni is 0 to 2
32
-1, which allows reverse-carry
addressing for FFTs up to 4,294,967,296 points.
Note: To achieve correct reverse-carry accessing for access widths of 2, 4, or 8, the last 1, 2, or 3 least
significant bits (respectively) of the address calculation result are forced to zero.
2.3.4.3 Modulo Addressing Mode
Modulo address modification is useful for creating circular buffers for FIFO queues, delay lines, and
sample buffers up to 2
31
bytes long.
Modulo addressing is selected by writing the MCTL AM3-0 bits of the MCTL register (as shown in
Table 2-10) as well as writing the desired modulus to the corresponding Mj register. Address modification
is performed in modulo M, where M ranges from 1 to +2
31
-1. Modulo M arithmetic causes the address
register values to remain within an address range of size M, thus defining a buffer with a lower and an
upper address boundary.
Each base address register (Bn register) is associated with an Rn register (B0 with R0, and so on). Each