ADD2
SC140 DSP Core Reference Manual
A-27
ADD2
Add Two 16-Bit Values (DALU)
ADD2
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example 1
add2 d0,d1
Example 2
add2 d0,d1
Operation
Assembler Syntax
Da.H + Dn.H
→
Dn.H
Da.L + Dn.L
→
Dn.L
ADD2 Da,Dn
ADD2 Da,Dn
Performs a 32-bit addition of source registers Da and Dn with carry disabled between bits 15 and 16, so
that the high and low words of each register are added separately. The result is stored back in Dn. The
extension byte of the result is undefined.
Register Address
Bit Name
Description
Ln
L
Clears the Ln bit in the destination register.
Register/Memory Address
Before
After
D0
$00 1100 1100
L1:D1
$0:$00 2200 3300
$0:$00 3300 4400
Register/Memory Address
Before
After
D0
$00 1101 F011
L1:D1
$0:$00 0020 2002
$0:$00 1121 1013
Содержание SC140 DSP Core
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