Fluke 9132A, Руководство по обслуживанию

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9132A Service
for line buffering, and out
J1 to the
Pod. The buffer
on
the status control lines
(U3) is an
inverting buffer.
The
signals
that pass through
this buffer
are
reinverted
in
the Pod. The double inversion reduces propagation delay
and
helps to
prevent pulse width distortion.
Every other line on the J2 connector
is
a ground line or,
in
most cases, a
“mostly” AC ground.
Each AC coupled line contains a 1-megobm bleed
resistor.
These AC circuits ensure
that,
when
the flying lead
set
is
used,
none of the leads can be directly shorted to another
lead.
One DC ground exists on J2 called fuse
2
ground (FUSE2-GND). This line
2
the DC return path for channel
3 (J2
pin 24), the Sync
Module overdrive
ne.
Another fuse and DC return path (FUSE1-GND)are available for the UUT
reset overdrive line at hole
E2.
Reset overdrive (OVDRV1)
is at
hole
E3.
The two fuse circuits are ORed together
to create the fuse sense
(FUSESENSE)
line.
The large bypass capacitors across the fuses
(C7, C8,
C9,
and C10)
are
used for AC coupling when overdriving. When short
overdrive pulses occur, the AC capacitors limit the voltage to zero volts for
a short time
(the
fuses alone have about
25
ohms resistance, which would
cause too much voltage drop). The diodes
(CR10,
CR11, CR12, and CR13)
protect the back-to-back capacitors.
The overdrive circuits (overdrive reset
and
overdrive channel
3) can be
driven either high or
low.
The overdrive highs
and
lows
are
gated
by
a set of
exclusive OR gates
(U1A,
U1B, UIC, and U1D),
are output to a voltage-
shifting network of diodes, and
then turn
on the
appropriate transistor
(either high or low). The transistors are
all voltage followers. Overdrive
high is connected to +12V through a current-limiting resistor
(R10).
Overdrive low
is
connected
to
-5V through a current-limiting resistor
(R11).
The small
capacitors in the overdrive circuit (C1, C2, C3, and
C4) are for
speed-up purposes.
The diodes
CR1,
CR2, CR3,
and
CR4 are used
as
reverse voltage protection for transistors Q1, Q2,
Q3, and Q4. Diodes
CRS,
CR6, CR7,
and CR14
compensate for
the
voltage drop from the
level shift of
the overdrive output protection circuit. CR15 and
CR16 between the
overdrive high and overdrive low drive transistors prevent the transistors
from turning
on at
the same
time.
ROM Modules
(24-, 28-,
and
32-Pin Assemblies)
2-11.
24-,
28-, and 32-pin ROM Modules use the same bare circuit board, but are
loaded with parts that determine the desired ROM component
size.
See the
ROM Module schematic diagram (Figure
5-5)
for details.
J3 and J4 connect to the ribbon cables
to
the Pod. J1
and J2 connect to the
ribbon cables to the ROM Module header assembly. The data lines from the
9132A Main Board
go
through a buffer
(U1) and
a protection hybrid network
(A1)
and out to the data lines
on
the UUT microprocessor.
ROM select (ROMSEL-) from the ROM Module PAL (U2)
controls
the
enable
on
Ul.
When the Pod is in RUNUUT mode or when dynamic
switching for the UUT ROM occurs, the PAL disables ROM select, and
2-13