ERM HR C6000, Руководство пользователя

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Bit7: Voice transmission starts
Bit6: OACSU requests to send interrupts, including first-time send and resend requests.
Bit5: End-to-end voice enhanced encryption interrupt, including EMB72bits update interrupt
and voice 216bits key update interrupt, which are distinguished by Bit5~Bit4 of Register
0x88, where 01 indicates EMB72bits update interrupt and 10 indicates voice 216bits key
update interrupt.
Bit4: The Vocoder configuration returns an interrupt (this interrupt is sent by the HR_C6000
to the MCU when the MCU manually configures the AMBE3000). This interrupt is only
valid when using the external AMBE3000 vocoder.
Bit3: Data transmission starts
Bit2: Data partial retransmission
Bit1: Data retransmission
Bit0: The vocoder is initialized to an interrupt. This interrupt is only valid when using an
external AMBE3000 or AMBE1000 vocoder.
In MSK mode, there is no sub-interrupt status.
Bit5: In DMR mode: indicates the end of transmission; in MSK mode: indicates the end of
transmission.
In DMR mode, there is a sub-status register 0x86 at the end of the transmission, and the
corresponding interrupt can be masked by 0x87. The sub-status register indicates six interrupts that
generate the end of the transmission, including:
Bit7: indicates that the service transmission is completely terminated, including voice and
data. The MCU distinguishes whether the voice or data is sent this time. Confirming that the
data service is received is the response packet that receives the correct feedback.
Bit6: Indicates that a Fragment length confirmation packet is sent in the sliding window data
service without immediate feedback.
Bit5: Voice OACSU wait timeout
Bit4: The Layer 2 mode handles the interrupt. The MCU sends the configuration information
to the last processing timing of the chip to control the interrupt. If after the interrupt, the
MCU has not written all the information to be sent in the next frame to the chip, the next
time slot cannot be Configured to send time slots. This interrupt is only valid when the chip
is operating in Layer 2 mode.
Bit3: indicates that a Fragment that needs to be fed back confirms the completion of the data
packet transmission. The interrupt is mainly applied to the acknowledgment message after
all the data packets have been sent or the data packet that needs to be fed back in the sliding
window data service is sent to the MCU to start waiting for the timing of the Response
packet. Device.
Bit2 : ShortLC Receive Interrupt