ERM HR C6000, Руководство пользователя

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address function
0x12 Bit[5:0] configures the RF transceiver switching
interrupt RF_TX_INTER relative to the 30ms
boundary advance, in increments of 100μs. s.
Bit[5:0] configures the RF transceiver switching
interrupt RF_RX_INTER relative to the 30ms
boundary advance, in increments of 100μs. s.
4.5 Use of Codec
HR_C6000 built-in CodeC for Mic input and LINEOUT output, Mic gain control and LINEOUT
The volume control effectively reduces the user's peripheral devices. At the same time, the standard
I2S interface is configured for the external CodeC, and the user can also select the appropriate
Codec according to his own needs.
4.5.1 Built-in Codec
OMISSIS
4.5.2 Use external Codec
OMISSIS
Figure 4.13 Interface circuit with external Codec
When the HR_C6000 uses an external Codec, data is exchanged with Codec through the I2S
interface. The interface timing is as follows.
OMISSIS
Figure 4.14 I2S Interface Timing
among them:
1. The LRCK clock frequency is determined by the Codec clock frequency and registers 0x32,
0x33. By default, the LRCK clock frequency is 8KHz.
LRCK clock frequency = Codec clock frequency / [2 * (parameter value + 1)], where the
parameter value is derived from {register 0x32 value, register 0x33 value}.
2. The BCLK clock frequency is determined by the Codec clock frequency and registers 0x30,
0x31.
BCLK clock frequency = Codec clock frequency / [2 * (parameter value + 1)], where the
parameter value is derived from {register 0x30 value, register 0x31 value}.
3. If the default external Codec (ALC5621) is used, LRCK is 8KHz and BCLK is 512KHz. At
the same time, the chip CLKOUT pin needs to be connected to the chip MCLK pin, and
CLKOUT outputs a 24.576MHz clock for the internal I2S operation of the chip. Connect the
CLKOUT pin of the chip to the working clock input pin of Codec. When using the chip
built-in Codec, the chip CLKOUT pin is not connected to the chip MCLK pin.