Epson EPL-N1200, Руководство по обслуживанию

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2.2.1.5 Parallel-B Interface Circuit
Figure 2-32 shows the Parallel-B interface circuit block diagram. Data sent from the host computer
is latched within the E05A93 by the STROBE signal. The E05A93 outputs the BUSY signal to stop
the host computer from sending additional data. The CPU resets the BUSY signal after reading the
data from the E05A93, so that the printer is ready to receive more data from the host computer.
2.2.1.6 Parallel-C Interface Circuit
Figure 2-33 shows the Parallel-C interface circuit block diagram. The 74ACT1284 is a bi-directional
bus driver IC that used to satisfy the data bus length under the IEEE1284 standard. The
E05B27(IC43) is used the Parallel-C interface to support, not only standard parallel interface, but
also compatibility mode and bi-directional mode (Nibble and ECP) under the IEEE1284 standard.
Latch
STROBE
BUSY
DATA
E05A93
(IC11)
Latch
Figure 2-32. Parallel-B Interface Circuit
Data 0-7
E05B27
(IC43)
74ACT1284
BUSY
/ACK
PE
SELECT
/ERR
/STB
/SEL IN
/AUTO
/INIT
/DIR
PD 0-7
BUSY
/ACK
PE
SELECT
/ERR
/STB
/SEL IN
/AUTO
/INIT
E05A93
(IC11)
I/ODB0-7
DB 0-7
/DIR
AB 0-4
Figure 2-33. Parallel-C Interface Circuit
Operating Principles EPL-N1200 Service Manual
2-22 Rev. A