CIRCUIT DESCRIPTION
6-10
August 2000
Part No. 001-2001-200
Frequencies are selected by programming the
three counters in U403 to divide by assigned numbers.
The programming of these counters is performed by
circuitry in the Third Party Interface (TPI), buffered
and latched through the Interface Alarm Card (IAC)
and fed into the synthesizer on J401, pin 20 to Data
input port U403, pin 19.
Data is loaded into U403 serially on the Data
input port U403, pin 19 when U403, pin 17 is low.
Data is clocked into the shift registers a bit at a time
by a low to high transition on the Clock input port
U403, pin 18. The Clock pulses come from the MPC
via the IAC to J401, pin 19.
As previously stated, the counter divide numbers
are chosen so that when the VCO is operating on the
correct frequency, the VCO-derived input to the phase
detector (f
V
) is the same frequency as the TCXO-
derived input (f
R
). The f
R
input is produced by divid-
ing the 17.5 MHz TCXO frequency by 2800. This
produces a reference frequency (f
R
) of 6.25 kHz.
Since the VCO is on frequency and no multiplication
is used, the frequencies are changed in 6.25 kHz steps.
The reference frequency is 6.25 kHz for all frequen-
cies selected by this Exciter.
The f
V
input is produced by dividing the VCO
frequency using the prescaler and N counter in U403.
The prescaler divides by 64 or 65. The divide number
of the prescaler is controlled by the N and A counters
in U403. The N and A counters function as follows:
Both the N and A counters begin counting down
from their programmed number. When the A counter
reaches zero, it halts until the N counter reaches zero.
Both counters then reset and the cycle repeats. The A
counter is always programmed with a smaller number
than the N counter. While the A counter is counting
down, the prescaler divides by 65. Then when the A
counter is halted, the prescaler divides by 64.
Example: To illustrate the operation of these
counters, assume a transmit frequency of 150.250
MHz. Since the VCO is the channel frequency for
transmit this frequency is used. To produce this fre-
quency, the N and A counters are programmed as fol-
lows:
N = 375 A = 40
To determine the overall divide number of the
prescaler and N counter, the number of VCO output
pulses required to produce one N counter output pulse
can be counted. In this example, the prescaler divides
by 65 for 65 x 40 or 2,600 input pulses. It then
divides by 64 for 64 x (375 - 40) or 21,440 input
pulses. The overall divide number K is therefore
(21,440 + 2,600) or 24,040. The VCO frequency of
150.250 MHz divided by 24,040 equals 6.25 kHz
which is the f
R
input to the phase detector. The overall
divide number K can also be determined by the fol-
lowing formula:
K = 64N + A
Where,
N = N counter divide number and
A = A counter divide number.
NOTE: Section 8.2.5 describes how the N and A
counter numbers can be calculated for other channels.
6.2.5 BUFFER AMPLIFIER
A cascode amplifier formed by Q403 and Q404
provides amplification and isolation between the
TCXO and Synthesizer U403. A cascode amplifier is
used because it provides high gain, high reverse isola-
tion and consumes only a small amount of power. The
input signal to this amplifier is coupled from TCXO
Y401, pin 5 by C420. C420 also provides DC block-
ing. Bias for the amplifier is provided by R430, R431,
R432, R433 and R428. L402 is an RF choke. RF
bypass is provided by C416, C418 and C419. The
output of Q403/Q404 is coupled to U403, pin 20 by
C417.
6.2.6 BUFFER AMPLIFIER
A cascode amplifier formed by Q406 and Q407
provides amplification and also isolation between the
VCO and Synthesizer U403. A cascode amplifier is
used because it provides high gain, high isolation and
consumes only a small amount of power. The input
signal to this amplifier is coupled from VCO A007,
pin 6 by C433. C433 also provides DC blocking.
Bias for the amplifier is provided by R450, R451,
R453, R454 and R455. L403 is an RF choke. RF
bypass is provided by C430, C431 and C479. The
output of Q406/Q407 is coupled to U403, pin 11 by a
non-polarized capacitor formed by C429/C499.
Содержание 242-20X1-213
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Страница 118: ...ALIGNMENT AND TEST PROCEDURES 7 20 August 2000 Part No 001 2001 200 ...
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