2-12
2.5
XSROM Power-Up Test Flow
Once the SROM has completed its tests and verified the path to the FEPROM
containing the XSROM code, it loads the first 8 Kbytes of XSROM into the
primary CPU’s S-cache and jumps to it.
Figure 2-6 XSROM Power-Up Flowchart
XSROM banner to
OCP/console device
Print mem info to console dev.
Check for illegal memory config.
Print warnings to console dev.
and OCP.
Initialize all memory pairs.
Clear SC_FHIT (force hit)
Enable all 3 S-cache banks
Run B-cache tests
Print errors to OCP/console dev.
Done message to console dev.
Initialize B-cache
and enable duplicate tag
Size system memory
through I squared C bus
Boot processor
redetermination
PKW0432A-96
Boot processor
redetermination
Primary
verifies checksum
of PAL/decomp/console
code
Primary unloads PAL/
decompression code or
fail-safe loader depending
upon results of checksum
Note: The XSROM can only print to the console device if
the environment variable console = serial. It always sends
output to the OCP.
Pass
Fail
Fail-safe
loader
Run memory texts.
Print trace to OCP/console dev.
Print errors to OCP/console dev.
Done message to console dev.
Primary jumps to PALcode
and starts the console
Secondaries alerted that
console has started. They
jump to and run PALcode
joining the console.
XSROM tests are described in Table 2-3. Failure indicates a CPU failure.
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