CY8CKIT-030 PSoC® 3 Development Kit Guide, Doc. # 001-61038 Rev. *J
17
Hardware
4.2.1.1
Power Supply Jumper Settings
Figure 4-3. Jumper Settings
Two jumpers govern the power rails on the board. J10 is responsible for the selection of Vddd (digital
power) and J11 selects Vdda (analog power).
The jumper settings for each power scheme are as follows.
Warning
■
Ensure that the Vdda is always higher than Vddd–J11 should not be set to 3.3-V position when
J10 is at 5-V position.
■
The power supply of the I/Os, Vddio, is connected to Vddd. Therefore, any input voltage to the
PSoC I/Os must not exceed the Vddd.
■
When USB power is used, ensure a 3.3-V setting on both J10 and J11. This is because the 5-V
rail of the USB power is not accurate and is not recommended. If you require 5-V operation, it is
recommended to use an external power supply adapter or a 9-V battery
4.2.1.2
Grounding Scheme
The board design considers analog designs as major target applications. Therefore, the grounding
scheme in the board is unique to ensure precision analog performance.
The board has three types of ground:
■
GND - This is the universal ground where all the regulators are referred. Both Vssd and Vssa
connect to this ground through a star connection.
■
Vssd - This is the digital ground and covers the digital circuitry on the board, such as RS-232 and
LCD.
■
Vssa - This is the analog ground and covers the grounding for analog circuitry present on the
board, such as the reference block.
When creating custom circuitry in the prototyping area provided on the board, remember to use the
Vssa for the sensitive analog circuits and Vssd for the digital ones.
Powering Scheme
Jumper Settings
Vdda = 5 V, Vddd = 5 V
J10 in 5-V setting and J11 in 5-V setting.
Vdda = 3.3 V, Vddd = 3.3 V
J10 in 3.3-V setting and J11 in 3.3-V setting.
Vdda = 5 V, Vddd = 3.3 V
J10 in 3.3-V setting and J11 in 5-V setting.
Vdda = 3.3 V, Vddd = 5 V
Can be achieved, but is an invalid condition because the PSoC 3 silicon
performance cannot be guaranteed.
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