EES3 Hardware Interface Description
3.3 Power Up / Power Down Scenarios
71
EES3_HD_v01.100b
Page 33 of 118
2009-08-12
Confidential / Released
:
DAI4 I
Tristate
I
DAI5 I
Tristate
I
DAI6
I
Tristate
I
1. Before reaching the defined state the signal has the intermediate state O, H for about 2s.
2. Before reaching the defined state the signal has the intermediate states O, H for about 2s and O, L for
about 1s.
3. Before reaching the defined state the signal has the intermediate state O, H for about 0.5s.
L = Low level
H = High level
L/H = Low or high level
I = Input
O = Output
OD = Open Drain
PD = Pull down with min +15µA and max. +100µA
PD(…k) = Fix pull down resistor
PU = Pull up with typ. -200µA and max. -350µA
PU(…k) = Fix pull up resistor
Table 8:
Signal states
Signal name
Undefined state
during startup
Defined state
after startup ini-
tialization
Active state after configuration by AT
command
SPI
I
2
C
DAI