EES3 Hardware Interface Description
3.3 Power Up / Power Down Scenarios
71
EES3_HD_v01.100b
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2009-08-12
Confidential / Released
3.3.2
Signal States after Startup
describes the various states each interface signal passes through after startup and dur-
ing operation.
As shown in
and
signals are in an undefined state while the module is initial-
izing. Once the startup initialization has completed, i.e. when the software is running, all signals
are in defined state. The state of several signals will change again once the respective interface
is activated or configured by AT command.
Table 8:
Signal states
Signal name
Undefined state
during startup
Defined state
after startup ini-
tialization
Active state after configuration by AT
command
SPI
I
2
C
DAI
SYNC
O, L
O, L
CCIN
I, PU(100k)
I, PU(100k)
CCRST
O, L
O, L
CCIO
O, L
O, L
CCCLK
O, L
O, L
CCVCC
O, L
2.9V
RXD0
I, PU
O, H
TXD0
I, PU
I, PD(330k)
CTS0
O, L
O, L
1
RTS0
I, PU
I, PD(330k)
DTR0
I, PU
I
DCD0
O, L
O, H
DSR0
O, L
O, L
1
RING0
I, PU
O, H
2
RXD1
O, H
O, H
TXD1
I, PD(330k)
I, PD(330k)
CTS1
L
O, L
1
RTS1
I, PD(330k)
I, PD(330k)
SPIDI
I
Tristate
I
Tristate
SPICS
I
O, H
O, L
Tristate
I2CDAT_SPIDO
I
Tristate
O, L/H
IO
I2CCLK_SPICLK
I
Tristate
O, L/H
O, OD
DAC_OUT
O, L
O, L
DAI0
I
O, L
O, L
DAI1 I
Tristate
I
DAI2 I
O,
L
3
O, L
DAI3
I
O, L
O, L