Caen DT5495, Руководство пользователя

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CAEN
Electronic Instrumentation
UM6508 – DT5495 User Manual rev. 0
50
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STATUS register: Contains status information.
Address: 0x1010.
Mode: Read only.
Bit Description
[31:5] reserved
[4] Register clear signal
[3] Register gate signal
[2] External clear signal
[1] External gate signal
[0] Data ready
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A-PORT MASK register: Masks the channels of port A.
Address: 0x1800.
Mode: Read and Write.
Bit Description
[31:0] The n-th bit set to 1 means that the corresponding channel of port A is masked
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B-PORT MASK register: Masks the channels of port B.
Address: 0x1804.
Mode: Read and Write.
Bit Description
[31:0] The n-th bit set to 1 means that the corresponding channel of port B is masked
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CONTROL register: Allows to set the demo configuration.
Address: 0x1808.
Mode: Read and Write.
Bit Description
[31:9] reserved
[8] Allows to select the signal type on ports G0, G1: 0 = NIM level, 1 = TTL level
[7:6] Reserved
[5] The gate of input port C ends when this bit is set
[4] The gate of input port C starts when this bit is set
[3:0]
0x0 = the port A (possibly masked) is sent to C when a gate signal is active.
0x1 = the port B (possibly masked) is sent to C when a gate signal is active.
0x2 = the AND of A and B (possibly masked) is sent t to C when a gate signal is active.
0x3 = the OR of A and B (possibly masked) is sent t to C when a gate signal is active.
0x4 = the port A (possibly masked) is captured and sent to C when a gate signal is active
0x5 = the port B (possibly masked) is captured and sent to C when a gate signal is active
0x6 = the AND of ports A and B (possibly masked) is captured and sent to C when a gate
signal is active
0x7 = the OR of ports A and B (possibly masked) is captured and sent to C when a gate
signal is active
0x8 = a clock counter (@ 50 MHz) is sent to C
0x9/0xF = the value of a register is sent to C