CAEN
Electronic Instrumentation
UM6508
–
DT5495 User Manual rev. 0
5
11
Demo Firmware
............................................................................................................ 48
11.1
Introduction
................................................................................................................................................ 48
11.2
Demo Structure
........................................................................................................................................ 48
11.3
Demo Setup
.............................................................................................................................................. 48
11.4
Gate Pattern Demo Description
............................................................................................................. 49
Introduction
......................................................................................................................................................................49
Register Map
....................................................................................................................................................................49
Register Description
.......................................................................................................................................................49
11.5
Pattern Recorder Demo Description
..................................................................................................... 52
Introduction
......................................................................................................................................................................52
Register Map
....................................................................................................................................................................52
Register Description
.......................................................................................................................................................52
11.6
DAC Demo Description
........................................................................................................................... 54
Introduction
......................................................................................................................................................................54
Register Map
....................................................................................................................................................................54
Register Description
.......................................................................................................................................................54
11.7
Gate and Delay Demo Description
........................................................................................................ 56
Introduction
......................................................................................................................................................................56
Register Map
....................................................................................................................................................................56
Register Description
.......................................................................................................................................................56
12
Software Development
................................................................................................ 59
13
CAEN Support
............................................................................................................... 60
13.1
Returns and Repairs
................................................................................................................................ 60
13.2
Technical Support Service
...................................................................................................................... 60
List of Figures
Fig. 2.1: Block diagram
........................................................................................................................................................................9
Fig. 3.1: Main components and interconnections
...........................................................................................................................10
Fig. 3.2: The UFPGA and GDG interface.
.......................................................................................................................................11
Fig. 4.1: front (top) and rear (down) panel view
.............................................................................................................................12
Fig. 7.1: DT5495 motherboard with mezzanine boards
................................................................................................................21
Fig. 7.2: Multi-pin connector pin assignment
..................................................................................................................................22
Fig. 7.3: CAEN A967 Cable Adapter
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Fig. 8.1: DT5495 hardware detection
...............................................................................................................................................24
Fig. 8.2: USB driver manual installation: Step1
..............................................................................................................................25
Fig. 8.3: USB driver manual installation: Step2
..............................................................................................................................25
Fig. 8.4: USB driver manual installation: Step3
..............................................................................................................................26
Fig. 8.5: USB driver manual installation: Step4
..............................................................................................................................26
Fig. 8.6: USB driver manual installation: Step5
..............................................................................................................................27
Fig. 8.7: The Network and Sharing Center window
.......................................................................................................................28
Fig. 8.8: Properties window of the Ethernet network
.....................................................................................................................28
Fig. 8.9: Ethernet Properti
es window”
..............................................................................................................................................29
Fig. 8.10: Properti
es window of the ”Internet Protocol Version (TPC/IPv4)”
..............................................................................29
Fig. 8.11: Instrument Information page of the DT5495 Web Interface
........................................................................................30
Fig. 8.12: Instrument Information page of the DT5495 Web Interface
........................................................................................30
Fig. 8.13: CAENUpgrader Get Firmware Release menu
..............................................................................................................31
Fig. 8.14: CAENUpgrader MFPGA Upgrade Firmware menu
......................................................................................................32
Fig. 8.15: CAENUpgrader UFPGA flash memory image menu
...................................................................................................33
Fig. 8.16: CAENUpgrader UFPGA Upgrade Firmware menu
......................................................................................................33
Fig. 8.17: CAEN PLULib Demo application prompt
.......................................................................................................................34
Fig. 10.1: CAENComm Demo Java and LabVIEW graphical interface
.......................................................................................40
Fig. 10.2: Local bus signals at a write access (x8BADF00D is written on register x1800)
......................................................42
Fig. 10.3: Local bus signal at a read access (x8BADF00D is read from register x1800)
.........................................................42
Fig. 10.4: Prefetch mechanism
.........................................................................................................................................................43
Fig. 10.5: Gate and Delay parameters representation
..................................................................................................................44
List of Tables
Tab. 1.1: Comparison table between V1495 and DT5495
..............................................................................................................7
Tab. 1.2: Table of models and related items
.....................................................................................................................................8
Tab. 5.1: DT5495 specifications table
..............................................................................................................................................17