CAEN
Electronic Instrumentation
UM6508
–
DT5495 User Manual rev. 0
4
Index
Purpose of this Manual
......................................................................................................................................... 2
Change Document Record
................................................................................................................................... 2
Symbols, Abbreviated Terms and Notation
....................................................................................................... 2
Reference Documents
........................................................................................................................................... 2
Index
........................................................................................................................................ 4
List of Figures
......................................................................................................................... 5
List of Tables
.......................................................................................................................... 5
1
Introduction
..................................................................................................................... 7
2
Block Diagram
................................................................................................................ 9
3
Main Components and Interconnections
.................................................................. 10
3.1
USB Interface
............................................................................................................................................ 11
3.2
Ethernet Interface
..................................................................................................................................... 11
3.3
Main FPGA
................................................................................................................................................ 11
3.4
User FPGA
................................................................................................................................................ 11
3.5
Gate and Delay Generator
...................................................................................................................... 11
3.6
Clock Distribution
..................................................................................................................................... 11
4
Front Panel Connectors, LEDs and Labels
.............................................................. 12
4.1
Front Panel
................................................................................................................................................ 13
4.2
Rear Panel
................................................................................................................................................ 15
5
Technical Specifications
............................................................................................. 17
6
Power Requirements
................................................................................................... 19
7
Getting Started with DT5495
....................................................................................... 20
7.1
Shipping Content
...................................................................................................................................... 20
7.2
Mezzanine Boards Installation
............................................................................................................... 21
7.3
Front Panel Connector Cabling
.............................................................................................................. 22
7.4
Power-on Configuration Sequence
........................................................................................................ 23
Restore Function
.............................................................................................................................................................23
8
Communication
............................................................................................................ 24
8.1
Drivers
........................................................................................................................................................ 24
Direct USB Driver Installation
......................................................................................................................................24
8.2
Ethernet Configuration
............................................................................................................................. 28
8.3
Web Interface
............................................................................................................................................ 30
8.4
Software Tools
.......................................................................................................................................... 31
CAENUpgrader
.................................................................................................................................................................31
PLULib Library
.................................................................................................................................................................34
9
Software Interface
........................................................................................................ 35
9.1
Address Map
............................................................................................................................................. 35
User FPGA Data Access (0x0000-0x0FFF)
................................................................................................................35
User FPGA Register Access (0x1000-0x7FFF)
.........................................................................................................35
Configuration ROM (0x8100-0x81FF)
.........................................................................................................................36
Configuration and Status Registers (0x8200-0x83FF)
...........................................................................................36
MFPGA Firmware Revision Register
..........................................................................................................................37
Software Reset Register
................................................................................................................................................37
Scratch Register
..............................................................................................................................................................37
Flash Configuration (0x8500-0x8AFF)
........................................................................................................................37
Internal Scratch SRAM(0x8C00-0x8FFF)
...................................................................................................................37
10
Firmware Development
................................................................................................ 38
10.1
Introduction
................................................................................................................................................ 38
10.2
User FPGA I/O ports
................................................................................................................................ 39
10.3
Local Bus Interface
.................................................................................................................................. 42
10.4
Gate and Delay Controller
...................................................................................................................... 44
General Description
........................................................................................................................................................44
Register Description
.......................................................................................................................................................45
Example Procedures
......................................................................................................................................................46
10.5
Porting V1495 to DT5495
....................................................................................................................... 47