Artesyn AXP640, Инструкция по установке и эксплуатации

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Shelf Management Alarm Module
AXP640 Installation and Use (6806800M24F)
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The FPGA device contains a built-in CRC error checker for detecting soft errors in the
configuration data. When a CRC error is detected the signal LATCH_CRC_ERROR is set active by
the ShMM-1500R CRC error detection circuit, which immediately sets the
ShMM_STATUS[0:1]_L and ACTIVE# signals high. The peer ShMM-1500R, if it is not already
active upon detecting the loss of the status serial bit streams, becomes the active ShMM-
1500R.
The HRI also includes 13 test points for in-service monitoring of the hardware redundancy
signals and for out-of-service diagnostics, enabling the ShMM-1500R to isolate failures on the
HRI to a single cShMM-1500R pair.
7.5.2.2 HRI Protocol
In the redundant configuration, the two ShMM-1500R boards communicate through the HRI
by exchanging data packets. The HRI continues to be operational in case of a single
interconnection failure and is able to detect a double failure. The HRI has a redundant
communication path, using four signals. In the case of a single wire permanent failure (the
signal gets stuck high, low or breaks), data packets continue to be transmitted through the
redundant communication path. A short between two of these four signals is considered a
double failure.
Figure 7-3 SAM HRI Interconnection