Analog Devices ADAV4601, Документ по проектированию системы

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ADAV4601 System Design Document Confidential Information
Rev.1 August 2009 Analog Devices Page 77
Address 0x010E and Address 0x010F Tweeter Right Balance Control Registers (Default:
0x0080, 0x0000)
These two registers (0x010E and 0x010F) control the balance for the right tweeter output.
The balance control words are 28-bit words in twos complement and a 5.23 format. This means there are five bits to
the left of the decimal point of which the most significant bit is the sign bit.
Table 22.
Bit No. Bit Name Description Default
Bits[15:12] Reserved Always write as 0 if writing to this register. 0000
Bits[11:0] Tweeter right balance control
register[27:0] 0x010E Bits[11:0] = tweeter right balance control
register[27:16] 000010000000
Bits [15:0] Tweeter right balance control
register[27:0] 0x010F Bits [15:0] = tweeter right balance
control register[15:0] 0000000000000000
Address 0x0110 and Address 0x0111 Woofer Left Balance Control Registers (Default:
0x0080, 0x0000)
These two registers control the balance for the left woofer output.
The balance control words are 28-bit words in twos complement and a 5.23 format. This means there are five bits to
the left of the decimal point of which the most significant bit is the sign bit.
Table 23.
Bit No. Bit Name Description Default
Bits[15:12] Reserved Always write as 0 if writing to this register. 0000
Bits[11:0] Woofer left balance control
register[27:0] 0x0110 Bits[11:0] = woofer left balance control
register[27:16] 000010000000
Bits [15:0] Woofer left balance control
register[27:0] 0x0111 Bits[15:0] = woofer left balance control
register[15:0] 0000000000000000
Address 0x0112 and Address 0x0113 Woofer Right Balance Control Registers (Default:
0x0080, 0x0000)
These two registers control the balance for the right tweeter output.
The balance control words are 28-bit words in twos complement and a 5.23 format. This means there are five bits to
the left of the decimal point of which the most significant bit is the sign bit.
Table 24.
Bit No. Bit Name Description Default
Bits[15:12] Reserved Always write as 0 if writing to this register. 0000
Bits[11:0] Woofer right balance control
register[27:0] 0x0112 Bits[11:0] = woofer right balance control
register[27:16] 000010000000
Bits [15:0] Woofer right balance control
register[27:0] 0x0113 Bits [15:0] = woofer right balance control
register[15:0] 0000000000000000