Analog Devices ADAV4601, Документ по проектированию системы

Страница: 106 / 112

ADAV4601 System Design Document Confidential Information
Rev.1 August 2009 Analog Devices Page 106
ADAV4601
A
G
N
D
A
G
N
D
A
G
N
D
A
G
N
D
A
G
N
D
D
G
N
D
D
G
N
D
D
G
N
D
D
G
N
D
D
G
N
D
O
D
G
N
D
BCLK0
LRCLK0
BCLK1
LRCLK1
BCLK2
LRCLK2
SDIN0
SDIN1
SDIN2
SDIN3
SDO0
T
O
A
U
D
IO
C
O
N
T
R
O
L
L
E
R
+
10µF
10nF
AUXOUT1L AUXOUT1L
+
10µF
10nF
AUXOUT1R AUXOUT1R
+
100µF
HPOUT1L HPOUT1L
+
100µF
HPOUT1R HPOUT1R
PWM1A PWM1A
PWM1B PWM1B
PWM2A PWM2A
PWM2B PWM2B
PWM3A PWM3A
PWM3B PWM3B
PWM4A PWM4A
PWM4B PWM4B
PWM_READY PWM_READY
SPDIF_OUT SPDIF_OUT
MCLK_OUT MCLK_OUT
+
10µF
10nF
AUXOUT3L AUXOUT3L
+
10µF
10nF
AUXOUT4R AUXOUT4R
XIN
XOUT
C1
C2
MUTE MUTE
SPDIF_IN6 SPDIF_IN6
SPDIF_IN5 SPDIF_IN5
SPDIF_IN4 SPDIF_IN4
SPDIF_IN3 SPDIF_IN3
SPDIF_IN2 SPDIF_IN2
SPDIF_IN1 SPDIF_IN1
RESET
AD0
SCL
SDA
IC
CONTROLLER
MCLKI CLOCK
RESET
CIRCUITRY
AUXIN1R AUXIN1R
20kΩ
+
10µF
AUXIN1L AUXIN1L
20kΩ
+
10µF
F
IL
T
D
+
0
.1
µ
F
1
0
µ
F
F
IL
T
A
+
0
.1
µ
F
4
7
µ
F
V
R
E
F
+
0
.1
µ
F
4
7
µ
F
IS
E
T
2
0
k
Ω
P
L
L
_
L
F
2
k
Ω
1nF 100nF
AVDD (PIN 53)
A
V
D
D
(P
IN
4
)
A
V
D
D
(P
IN
5
3
)
+
1
0
µ
F
A
V
D
D
(P
IN
5
9
)
0
.1
µ
F
+ 1
0
µ
F
+
1
0
µ
F
0
.1
µ
F
1
n
F
A
V
D
D
(P
IN
6
8
)
0
.1
µ
F
A
V
D
D
(P
IN
7
1
)
0
.1
µ
F
0
.1
µ
F
3.3V
D
V
D
D
D
V
D
D
0
.1
µ
F
0
.1
µ
F
+
1
0
µ
F
1.8V
0.1µF
+
10µF
3.3V
O
D
V
D
D
0
7
0
7
0
-1
0
7
Figure 76: Typical Application Diagram