Stratix II Memory Board 2 Rev A User Guide Rev 0.1
Altera Confidential
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Figure 7 BTS GUI NIOS Stamp Tab
The two memory interfaces perform walking ones tests on the address and data of each
interface. Messages regarding the tests are reported in the NIOS Stamp Msgs window.
The Ethernet interface test attempts to acquire an internet protocol (IP) address using the
dynamic host configuration protocol (DHCP). If the Ethernet interface is not connected
to, or cannot find a DHCP server, the test fails. However, the Ethernet chip is detected,
and the status of the DHCP acquisition is reported in the BTS Msgs window.
3.3.2
DDR2 SDRAM DIMM Test
This section describes the DDR2 SDRAM dual in-line memory module (DIMM) test.
Refer to “DDR2 SDRAM DIMM” in section 3.1.6 for information on how to perform the
test. The DDR2 SDRAM DIMM test uses the Altera® DDR2 SDRAM MegaCore®
function, the example driver provided with the MegaCore function, and some logic to
indicate the status of the test. This test reads and writes pseudo-random binary sequence
(PRBS) data to and from the DDR2 SDRAM DIMM. The MegaCore function also
includes a testbench, and simulation instructions.
