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DeviceNet
QUICKDESIGNER
Byte Addressing Layout
IB0
IB1
IB2
IB3
IB4
IB5
IB250
IB251
IB252
IB253
IW0
IW1
IW2
ID0
ID1
ID2
IW252
ID250
BYTE
WORD
DWORD
QB0
QB1
QB2
QB3
QB4
QB5
QB250
QB251
QB252
QB253
QW0
QW1
QW2
QD0
QD1
QD2
QW252
QD250
BYTE
WORD
DWORD
For the combination of a W, DW, W, the following example shows the layout.
QB0
QB1
QB2
QB3
QB4
QB5
QW0
BYTE
QD2
QW6
QB6
QB7
IB0
IB1
IB2
IB3
IB4
IB5
IW0
BYTE
ID2
IW6
IB6
IB7
Word Addressing Example
Input Words = 127, Output Words = 127, Input start address = 0, Output start address = 0.
Name Address range
Value range
Write
Type
I (Input Bit)
I0.0 to I126.15
0 to 1
Y
Bit
Q (Output Bit)
Q0.0 to Q126.15
0 to 1
N
Bit
IW (Input Word)
IW0 to IW126
-32768 to 32767
Y
Word
QW (Output Word)
QW0 to QW126
-32768 to 32767
N
Word
ID (2 Word Input)
ID0 to ID125
-999999999 to
999999999
Y
DWord
QD (2 Word Output)
QD0 to QD125
-999999999 to
999999999
N
Dword